5–7 Jun 2017
Krakow
Europe/Zurich timezone

HV-CMOS testing and design

7 Jun 2017, 11:10
20m
Krakow

Krakow

AGH UST Al. Mickiewicza 30 30-059 Krakow, Poland

Speaker

Emanuele Cavallaro (IFAE - Barcelona (ES))

Description

The ATLAS collaboration is studying the possibility to install HV-CMOS devices in the outermost layer of the upgraded pixel detector of the ATLAS ITk for HL-HLC.
For this purpose different technologies are being investigated and different prototypes have already been produced and tested.
IFAE is participating both in design and testing of HV-CMOS devices.
Beam test results of the monolithic matrices of irradiated and non irradiated H35Demo devices will be presented. Moreover the IFAE contribution to the design of different HV-CMOS chip productions will be shown.

Author

Emanuele Cavallaro (IFAE - Barcelona (ES))

Presentation materials