Conveners
Systems, Planning, Installation, Commissioning and Running Experience
- Christian Joram (CERN)
Systems, Planning, Installation, Commissioning and Running Experience
- Julie Whitmore (Fermi National Accelerator Lab. (US))
Systems, Planning, Installation, Commissioning and Running Experience
- Philippe Farthouat (CERN)
Systems, Planning, Installation, Commissioning and Running Experience
- Ken Wyllie (CERN)
Systems, Planning, Installation, Commissioning and Running Experience
- Philippe Farthouat (CERN)
The Scalable Readout System (SRS) of the RD51 collaboration with the APV25 ASIC is driving R&D for gaseous detectors. Discontinuation of APV25 and demands on flexibility concerning e.g. detector capacitance and readout rate induced a replacement of the ASIC, for which the collaboration has chosen the VMM chip of the ATLAS New Small Wheel upgrade.
A prototype SRS VMM system was operated with...
The new proton timing detectors of the Totem experiment, based on Ultrafast silicon detectors installed in Roman Pots at 220 meters from the interaction point 5 at LHC, will be read out through a fast sampler chip: the SAMPIC.
The best timing resolution can be obtained only by having the waveform of the detector signal.
The challenges to integrate the chip in the Totem-CMS DAQ and control...
Real-time track reconstruction at hadron colliders is one of the most powerful tools to select interesting events from the huge background while mitigating the pile-up effect. The Fast Tracker, an upgrade to the current ATLAS trigger system, will feed the high level trigger with high quality tracks reconstructed over the entire detector at 100 kHz rate. Half of the system has been produced and...
In order for the CMS electromagnetic and hadronic calorimeters in the barrel region (EB, HB) to support the high-luminosity upgrade of the LHC, the off-detector electronics (Back-End) must be replaced. For EB, the new Back-End has been designed to take over functions of the legacy Front-End electronics in order to handle the required increase in the sampling frequency and the granularity of...
The SAMPIC chip is based on the concept of Waveform Time to Digital Converter introduced in 2013. It permits performing timing measurements with a precision of a few ps directly on detector signals. The waveforms are digitized between 1.6 and 8.2 GS/s rate over 64 samples and Time Over Threshold measurement is integrated. A set of boards and DAQ system has been developed to record data with...
A serial power scheme will be used for the new inner tracking detector for the Phase-II upgrade of the ATLAS experiment. New elements are required to operate and monitor a serially powered detector, including a detector control system (DCS), constant current sources and front-end electronics with shunt regulators.
A demonstrator for the outer barrel is built at CERN to verify the concept and...
In this contribution, we will present the status of the electronics system of the triple-GEM detectors for the CMS GE1/1 upgrade, which is planned for installation in 2019-2020, as well as the performance of ten prototype detectors which have been installed in CMS since 2017.
For this new CMS muon sub-detector, a new front-end chip, the VFAT3, has been designed. The VFAT3 communicates with...
The present ATLAS small wheel muon detector will be replaced with a New Small Wheel detector in 2019. The frontend electronics will be implemented in about 8000 boards including the design of 4 custom ASICs capable of driving trigger and tracking primitives to the backend trigger processor and readout system. The large number of readout channels, short time available to prepare and transmit...
The central building block of the Upgrade are staves and petals which host up to 14 modules per side. The incoming data is sent to the EoS and multiplexed by the lpGBT chips on 10 Gbit/s links and sent via optical transmitters (VL+) off-detector. Prototype boards have been designed, manufactured and used with the present chip versions of the GBTX /GBT-SCA chip family. This talk will summarize...
The CMS detector for LHC Phase-2 will be read out at 750 kHz for an event size of 7.5 MB. The optical links from detector front-ends are aggregated in ATCA back-end boards. A DAQ-and-Timing Hub (DTH) aggregates data streams from back-end boards over point-to-point links, provides buffering and transmission over 100Gb/s TCP/IP Ethernet links. The DTH is also responsible for distributing timing,...
To maintain high trigger efficiencies and stable rates during significant changes to beam conditions throughout 2017, the CMS Level-1 calorimeter trigger required dynamic and flexible operation. Successfully running since 2015, utilising Xilinx Virtex 7 690 FPGAs and 10 Gbps optical links, the versatile design has enabled quick adaption to improve algorithms to mitigate large rates from high...
Electronics developments are pursued for the trigger readout of the ATLAS Liquid-Argon Calorimeter towards the Phase-I upgrade scheduled in the LHC shut-down period of 2019-2020. The LAr Trigger Digitizer system will digitize 34000 channels at a 40 MHz sampling with 12 bit precision after the bipolar shaper at the front-end system, and transmit to the LAr Digital Processing system in the...
The silicon modules of the Phase-2 CMS Outer Tracker feature service hybrids, which are flex PCBs that will carry radiation-tolerant DC-DC converters, the Low Power GBT chip, and a VTRx+ module. The strip modules are powered via a two-step DC-DC conversion scheme, while the data from the front-end hybrids are collected and serialized by the LpGBT, and passed on to the VTRx, which performs...
