Name: TWEPP 2018 Topical Workshop on Electronics for Particle Physics
Start: 2018-09-17T11:00:00+02:00
End: 2018-09-21T18:00:00+02:00
Location: No location set

TWEPP 2018 Topical Workshop on Electronics for Particle Physics

from Monday 17 September 2018 (11:00) to Friday 21 September 2018 (18:00)

Monday 17 September 2018

11:00 Registration
Registration
11:00 - 14:00
14:00
14:00 - 14:50
Room: CAR 0.05/0.06 (aula)
Contributions

14:00 Welcome 1

14:25 Welcome 2 - Paul Leroux (KU Leuven (BE))
14:50
14:50 - 15:20
Room: CAR 0.05/0.06 (aula)
Contributions

14:50 Nuclear structure research and applications with Radioactive Ion Beams at ISOLDE/CERN - Riccardo Prof. dr. Raabe (KU Leuven)
15:20
15:20 - 15:50
Room: CAR 0.05/0.06 (aula)
Contributions

15:20 The BRAVE FPGAs: overview and status of the European radiation-hardened FPGAs for space - David Merodio Codinachs (ESA)
15:50 Coffee break
Coffee break
15:50 - 16:20
Room: FBS 0.01/0.02 (Feestzaal)
16:20
16:20 - 17:05
Room: CAR 0.05/0.06 (aula)
Contributions

16:20 Technology and challenges for extreme ultraviolet lithography - Van Der Zande Wim
17:30 Guided walk + Welcome Reception
Guided walk + Welcome Reception
17:30 - 20:30
Room: Port House
Tuesday 18 September 2018
09:00
09:00 - 10:15
Room: CAR 0.05/0.06 (aula)
Contributions

09:00 Characterization of the MPA prototype, a 65 nm pixel readout ASIC with on-chip quick transverse momentum discrimination capabilities. - Davide Ceresa (CERN)

09:25 MIMOSIS, the CMOS Pixel Sensor for the CBM Micro-Vertex Detector - Frederic Morel (Centre National de la Recherche Scientifique (FR))

09:50 Two Designs of 4 × 14-Gbps VCSEL Array Driver in 65 nm CMOS for HEP Applications - Jingbo Ye (Southern Methodist University (US))
09:00 - 10:15
Room: CAR 1.09 (aula)
Contributions

09:00 The VMM front-end integration in the Scalable Readout System: On the way to a next generation readout system for generic detector R&D and experiment instrumentation - Michael Lupberger (CERN)

09:25 The Proton Timing System of the TOTEM experiment at LHC - Edoardo Bossini (CERN & INFN-Pisa (IT))

09:50 First performance measurements of the Fast Tracker Real Time Processor at ATLAS - Nicolo Vladi Biesuz (INFN Sezione di Pisa, Universita' e Scuola Normale Superiore, P)
10:15 Coffee break
Coffee break
10:15 - 10:45
Room: FBS 0.01/0.02 (Feestzaal)
10:45
10:45 - 11:30
Room: CAR 0.05/0.06 (aula)
Contributions

10:45 The CMS High Granularity Calorimeter for HL-LHC - David Barney (CERN)
11:35
11:35 - 12:25
Room: CAR 0.05/0.06 (aula)
Contributions

11:35 Radiation tolerance enhancement of silicon photonics for HEP applications - Andrea Kraxner (CERN)

12:00 Next generation of Radiation Tolerant Single-Mode Optical Links for Accelerator Instrumentation - Carmelo Scarcella (CERN)
11:35 - 12:25
Room: CAR 1.09 (aula)
Contributions

11:35 Reliability test results of the interconnect structures of the front-end hybrids for the CMS Phase-2 Tracker Upgrade - Mark Istvan Kovacs (CERN)

12:00 Test strategy for low failure rates and status of a highly integrated readout chip for PMTs in JUNO - André Zambanini (Forschungszentrum Jülich GmbH)
12:25 Lunch
Lunch
12:25 - 14:00
14:00
14:00 - 15:15
Room: CAR 0.05/0.06 (aula)
Contributions

14:00 Characterization of GEMINI, a 16-channels programmable readout interface for Triple-GEM detectors in 180 nm CMOS. - Luca Mangiagalli (University of Milano-Bicocca)

14:25 PACIFIC: The readout ASIC for the SciFi Tracker of the LHCb detector - Albert Comerma Montells (Ruprecht Karls Universitaet Heidelberg (DE))

14:50 A 10-Gbps 4-channel VCSEL array driver with an on-chip charge pump power supply - Jingbo Ye (Southern Methodist University (US))
14:00 - 14:25
Room: CAR 1.09 (aula)
Contributions

14:00 Novel production method for large double-sided microstrip detectors of the CBM Silicon Tracking System at FAIR - Patrick Pfistner (KIT)
14:25
14:25 - 15:15
Room: CAR 1.09 (aula)
Contributions

14:25 NaNet: a Reconfigurable PCIe Network Interface Card Architecture for Real-time Distributed Heterogeneous Stream Processing in the NA62 Low Level Trigger. - Paolo Cretaro (INFN - National Institute for Nuclear Physics)

14:50 ALICE trigger system for LHC Run 3 - Marian Krivda (University of Birmingham (GB))
15:15 Coffee break
Coffee break
15:15 - 15:40
Room: FBS 0.01/0.02 (Feestzaal)
15:40
15:40 - 16:25
Room: CAR 0.05/0.06 (aula)
Contributions

15:40 Silicon photonics for next-generation optical interconnects - Sebastien Lardenois (IMEC)
16:30
16:30 - 17:20
Room: CAR 0.05/0.06 (aula)
Contributions

16:30 System level serial powering studies of RD53A chip - Alvaro Pradas Luengo (Aragon Institute of Technology (ES))
17:20 Posters session - 1 ASIC
Posters session - 1 ASIC
17:20 - 18:50
Room: FBS 0.01/0.02 (Feestzaal)
Contributions

17:20 An integrated SRAM radiation monitor in 180 nm CMOS technology - Jeffrey Prinzie (KU Leuven (BE))

17:35 A 65 nm Data Concentration ASIC for the CMS Outer Tracker Detector Upgrade at HL-LHC - Benedetta Nodari (Centre National de la Recherche Scientifique (FR))

17:50 Design and characterization of a high speed transmitter circuit for the ATLAS/CMS HL-LHC pixel readout chip - Tianyang Wang (University of Bonn (DE))

18:05 A System-Verilog Verification Environment for the CIC Data Concentrator ASIC of the CMS Outer Tracker Phase II Upgrades - Simone Scarfi' (EPFL - Ecole Polytechnique Federale Lausanne (CH))

18:35 The Quality Assurance of two ASICs for the ATLAS Liquid Argon Calorimeter Phase-I Upgrade - Le Xiao (Central China Normal University)

18:35 A high integration and low power ASIC with TOT front-end and waveform sampling for MRPC applications - Jiayi Ren (Institute of High Energy Physics,Chinese Academy of sciences)

18:35 A Capacitor DAC for Charge Redistribution Analog to Digital Converter with Successive Approximation - Pavel Vancura (FJFI CVUT, FEL CVUT)

18:35 Prototype Front-end ASIC for Silicon-strip Detectors of J-PARC Muon g-2/EDM Experiment - Yuki TSUTSUMI (University of Kyushu)

18:35 A 130 nm CMOS PLL for Phase-II ATLAS-MDT TDC - Federica Resta (University and INFN Milano Bicocca)

18:35 A 28 nm Fast Tracker Front-end for sMDT Detectors at Future Hadron Colliders - Luca Mangiagalli (University of Milano-Bicocca)

18:35 Application Of Multiple Use SiPM Integrated Circuit (eMUSIC) For Readout Based Time-Of-Flight Detectors - Anand Sanmukh

18:35 An UVM-based verification environment for the lpGBT 10 Gbps transceiver ASIC - Jose Pedro Castro Fonseca (CERN)

18:35 A Topmetal-based and High-Performance Resistance Measurement Circuit for the Thin-Film Sensitive Gas Detection - Mangmang An (Hubei University of Arts and Science)

18:35 An Ultra-Fast 10Gb/s 64b66b Data Serialiser Back-end in 65nm CMOS Technology - Thomas Gardiner (STFC)

18:35 ASoC: A High Performance Waveform Sampling and Feature Extraction System-on-Chip for Data Acquisition - Isar Mostafanezhad (Nalu Scientific, LLC)

18:35 MuPix9 - a HV-MAPS prototype with serial powering - Alena Larissa Weber (Ruprecht Karls Universitaet Heidelberg (DE))

18:35 Design of HVCMOS pixel sensor ASIC with on-chip readout electronics for ATLAS ITk Upgrade - Mridula Prathapan (KIT - Karlsruhe Institute of Technology (DE))

18:35 A Sigma-Delta ADC for Pixel Charge Readout Targeting Neutrinoless Double-Beta Decay Search in High-Pressure TPC - Xing Huang

18:35 A rad-hard full information pixel imager chip for the HEPS-TF project - Wei Wei (IHEP, CAS)

18:35 Development and performance of the new front-end ASIC for the ATLAS MDT chambers at the HL-LHC - Robert Richter (Max-Planck-Institut fur Physik (DE))

18:35 Design of a monolithic HR-CMOS sensor chip for the CLIC silicon tracker - Iraklis Kremastiotis (KIT - Karlsruhe Institute of Technology (DE))

18:35 ABACUS : Two fast amplifiers for the readout of LGAD detectors - Giovanni Mazza (INFN sez. di Torino)

18:35 A 10 GSa/s Waveform Sampling ASIC with Multi-Event Buffering Capability - John Porter (Sandia National Laboratories)

18:35 A High Dynamic Range ASIC for Time of Flight PET with monolithic crystals - Sergio Gómez Fernández (University of Barcelona - Institute of Cosmos Sciences (ICCUB))

18:35 Study of Time of Arrival Measurement with Constant Fraction Discrimination Using Switched Capacitor Sampling or Bucket-Brigade Analog Time Delay Line - Grzegorz Deptuch (Fermi National Accelerator Lab. (US))

18:35 Design and status of custom-designed ASICs for the Phase-I upgrade of the ATLAS muon spectrometer - Dimitrios Matakias (National Technical Univ. of Athens (GR))

18:35 The Quality-Assurance Test of the ATLAS New Small Wheel Read-Out Controller ASIC - Stefan Popa (Transilvania University of Brasov (RO))

18:35 The Readout and Data Transmission of a Monolithic Active Pixel Sensor prototype for the CEPC Vertex Detector - Le Xiao (Central China Normal University)

18:35 A Low-Noise Charge-Sensitive Amplifier for Gain-less Charge Readout in High-pressure TPC - Chaosong Gao (Central China Normal University)

18:35 Algorithms for Threshold Dispersion Minimization of the CHIPIX65 Asynchronous Front-End - Mauro Sonzogni (University of Bergamo)
Posters session - 1 Optoelectronics and Links
Posters session - 1 Optoelectronics and Links
17:20 - 18:50
Room: FBS 0.01/0.02 (Feestzaal)
Contributions

17:20 MULTI-GIGABIT PHOTONIC TRANSCEIVERS FOR HARSH ENVIRONMENT APPLICATIONS - Ross Thomson

17:35 Precision Clock Distribution studies for timing in phase II upgrade of the CMS experiment - Pierre-Anne Bausson (Université Paris-Saclay (FR))

17:50 Thermal characterisation of the Versatile Link PLUS Transceiver - Csaba Soos (CERN)

18:05 New LpGBT-FPGA IP: Simulation model and first implementation - Julian Maxime Mendez (CERN)

18:20 In-situ Radiation Damage Studies of VCSELs and p-i-n diodes in the ATLAS SemiConductor Tracker - Gavin Pownall (University of Oxford (GB), DESY (DE))

18:35 Concept, design and verification of components for an integrated on-detector silicon photonic multi-channel transmitter unit - Yunlong Zhang (Karlsruhe Institute of Technology (KIT))
Posters session - 1 Programmable Logic, Design Tools and Methods
Posters session - 1 Programmable Logic, Design Tools and Methods
17:20 - 18:50
Room: FBS 0.01/0.02 (Feestzaal)
Contributions

17:20 Remote control unit of the LHC injector complex BLM system - Eva Calvo Giraldo (CERN)

17:35 An automated pipeline for continuous integration of FPGA firmware and software for the LHCb Run3 upgrade - Paolo Durante (CERN)

17:50 Ethernet-based slow control system for parallel configuration of FPGA-based front-end boards - Wojciech Zabołotny (Institute of Electronic Systems, Warsaw University of Technology)

18:05 GBT oriented firmware for Data Processing Boards for CBM - Wojciech Zabołotny (Institute of Electronic Systems, Warsaw University of Technology)

18:35 FPGA Based Time Measurement for the MRPC Detector - Jie Zhang (Institute of High Energy Physics, Chinese Academy of Sciences)

18:35 FPGA Implementation of an Artificial Neural Network for Subatomic Physics Experiment Particles Recognition - Ruiguang ZHAO (university of strasbourg)

18:35 Machine learning: hit time finding with a neural network - Richard Thalmeier

18:35 A possible implementation of a detector specific extension of the FELIX firmware for the ITk Pixel subdetector - Carsten Dulsen (Bergische Universitaet Wuppertal (DE))
Wednesday 19 September 2018
09:00
09:00 - 10:15
Room: CAR 0.05/0.06 (aula)
Contributions

09:00 Developement of ultra-low power, rad-hard SAR ADCs in 130 nm CMOS technologies - Jakub Moron (AGH University of Science and Technology (PL))

09:25 HGCROC-V1: a prototype ASIC for CMS HGCAL - Christophe De La Taille (OMEGA (FR))

09:50 Design and performance of GEMROC2 – a readout ASIC for Micro Pattern Gas Detectors - Bartłomiej Łach (AGH University of Science and Technology)
09:00 - 10:15
Room: CAR 1.09 (aula)
Contributions

09:00 The Barrel Calorimeter Processor demonstrator board for the Phase II Upgrade of CMS - Nikitas Loukas (University of Notre Dame (US))

09:25 SAMPIC-based systems for precise timing detectors: implementation and performance. - Jihane Maalmi (CNRS/LAL Orsay (FR))

09:50 Control and Monitoring for a serially powered pixel demonstrator for the ATLAS Phase II upgrade - Niklaus Lehmann (Bergische Universitaet Wuppertal (DE))
10:15 Coffee break
Coffee break
10:15 - 10:45
Room: FBS 0.01/0.02 (Feestzaal)
10:45
10:45 - 11:30
Room: CAR 0.05/0.06 (aula)
Contributions

10:45 Trends and challenges in monolithic CMOS sensor development for high energy physics - Walter Snoeys (CERN)
11:35
11:35 - 12:25
Room: CAR 0.05/0.06 (aula)
Contributions

11:35 A Radiation-Tolerant Low-power 4x10 Gb/s VCSEL Driver Array IC with on-Chip Power-On Control Circuit - Liang Fang (Southern Methodist University (US))

12:00 LC-TOSA/ROSA-Based Optical Transmitter (MTx+) and Optical Transceiver (MTRx+) for Detector Frontend Readout - Jingbo Ye (Southern Methodist University (US))
11:35 - 12:25
Room: CAR 1.09 (aula)
Contributions

11:35 HLS4ML: deploying deep learning on FPGAs for L1 trigger and Data Acquisition - Javier Mauricio Duarte (Fermi National Accelerator Lab. (US))

12:00 The Muon to Central Trigger Processor Interface for the Upgrade of the ATLAS Muon Trigger for Run-3 - Marcos Vinicius Silva Oliveira (Federal University of Juiz de Fora (BR))
12:25 Lunch
Lunch
12:25 - 14:00
14:00
14:00 - 15:15
Room: CAR 0.05/0.06 (aula)
Contributions

14:00 Characterization of the first prototype of the Silicon Strip readout ASIC (SSA) for the CMS Outer Tracker Phase II upgrade - Alessandro Caratelli (Ecole Polytechnique Federale de Lausanne (EPFL), Microelectronic System Laboratory (LSM), Switzerland)

14:25 FLAME - A readout ASIC for a luminosity calorimeter at a future linear collider - Marek Idzik (AGH University of Science and Technology (PL))

14:50 Algorithm for an asynchronous approximation of a center of gravity for charge sharing compensation in pixel detectors’ readout circuits - Piotr Otfinowski (AGH University of Science and Technology)
14:00 - 15:15
Room: CAR 1.09 (aula)
Contributions

14:00 Hardware Trigger Processor for the ATLAS NSW System - Thiago Costa De Paiva (University of Massachusetts (US))

14:25 Jets and topological trigger selection performed with the last generation Xilinx FPGA - Marek Palka (Jagiellonian University (PL))

14:50 Serenity - An ATCA prototyping platform for CMS Phase-2 - Andrew Rose (Imperial College London)
15:15 Group photo in the courtyard
Group photo in the courtyard
15:15 - 15:20

15:20 Coffee break
Coffee break
15:20 - 15:45
Room: FBS 0.01/0.02 (Feestzaal)
15:45
15:45 - 16:30
Room: CAR 0.05/0.06 (aula)
Contributions

15:45 It is Time to use Time (for Digital RF Clock Generation and Time-of-Flight) - R. Bogdan Staszewski (University College Dublin)
16:30 FPGAs & Timing Working Group
FPGAs & Timing Working Group
16:30 - 17:45
Room: CAR 1.07 (class room)
Contributions

16:30 NanoExplore rad-hard FPGA radiation tests for CERN applications - Salvatore Danzeca (CERN)

16:45 Case-study of continuous integration of FPGA firmware and software - Paolo Durante (CERN)

17:00 Introduction to the lpGBT-FPGA - Julian Maxime Mendez (CERN)

17:15 Implementing the High Precision Timing IP for Xilinx Ultrascale FPGA transceivers - Eduardo Brandao De Souza Mendes (CERN)

17:30 Phase Noise Studies on the Si5345 PLL - Jeroen Hegeman (CERN)
Microelectronics MUG
Microelectronics MUG
16:30 - 17:55
Room: CAR 1.09 (aula)
Contributions

16:30 Advanced materials and devices to extend the technology roadmap - Dr. Nadine Collaert (IMEC)

17:00 Europractice IC services - Paul Malisse (IMEC/Europractice)

17:15 Europractice EDA tools for the HEP community - John McLean (UKRI STFC UK)

17:30 Radiation Device models for a 65nm technology - Tuomas Sakari Poikela (CERN)

17:40 News on Foundry Access Services via CERN - Alessandro Caratelli (Ecole Polytechnique Federale de Lausanne (EPFL), Microelectronic System Laboratory (LSM), Switzerland)
Powering
Powering
16:30 - 17:45
Room: CAR 1.02 (class room)

19:00 Conference dinner
Conference dinner
19:00 - 23:00
Room: Art Nouveau Room
Thursday 20 September 2018
09:00
09:00 - 10:15
Room: CAR 0.05/0.06 (aula)
Contributions

09:00 RD53A: a large scale prototype for HL-LHC silicon pixel detector phase 2 upgrades - Ennio Monteil (Universita e INFN Torino (IT))

09:25 Test results of irradiated hybrid and monolithic CMOS pixel circuits in LFoundry 150 nm technology for the ATLAS Inner Tracker Upgrade - Zongde Chen (Aix Marseille Univ, CNRS/IN2P3, CPPM, Marseille, France)
09:00 - 10:15
Room: CAR 1.09 (aula)
Contributions

09:00 Status of the Readout Electronics for the Triple-GEM Detectors of the CMS GE1/1 System and Performance of the Slice Test in the 2017-18 LHC Run - Elizabeth Rose Starling (Université Libre de Bruxelles (Belgium))

09:25 Frontend and backend electronics for the New Small Wheel Upgrade of the ATLAS muon spectrometer - Xu Wang (University of Michigan (US))

09:50 The End-of-Substructure (EoS) card for the Strip Tracker Upgrade of the ATLAS experiment - Chaowaroj Wanotayaroj (DESY)
10:15 Coffee break
Coffee break
10:15 - 10:45
Room: FBS 0.01/0.02 (Feestzaal)
10:45
10:45 - 11:30
Room: CAR 0.05/0.06 (aula)
Contributions

10:45 Bionic Hearing: the Science and the Experience - Shirpsey Ian (Oxford University)
11:35
11:35 - 12:25
Room: CAR 0.05/0.06 (aula)
Contributions

11:35 Radiation hard Depleted Monolithic Active Pixel Sensors with high-resistivity substrate - Stefano Terzo (IFAE Barcelona (ES))

12:00 Irradiation test on the nSYNC ASIC using X-Ray and protons beam - Davide Brundu (Universita e INFN, Cagliari (IT))
11:35 - 12:00
Room: CAR 1.09 (aula)
Contributions

11:35 Design and development of the DAQ and Timing Hub for CMS Phase-2 - Jeroen Hegeman (CERN)
12:00
12:00 - 12:25
Room: CAR 1.09 (aula)
Contributions

12:00 Sorting of STS-XYTER2 data for microslice building for CBM experiment - Marek Gumiński (Warsaw Uniwesity of Technology)
12:25 Lunch
Lunch
12:25 - 14:00
14:00
14:00 - 15:15
Room: CAR 1.09 (aula)
Contributions

14:00 Improved tapped-delay-line Time-to-Digital Converter (TDC) with time-over-threshold (TOT) measurement for a new generation of Resistive Plate Chamber (RPC) detectors - Xiushan CHEN (Institut de Physique Nucléaire de Lyon, Université de Lyon, Université de Lyon 1, CNRS-IN2P3, UMR 5822)

14:25 A collaborative HDL management tool for ATLAS L1Calo upgrades - Francesco Gonnella (University of Birmingham (GB))

14:50 FELIX: developing a new detector interface for ATLAS trigger and readout - Gokhan Unel (University of California Irvine (US))
14:00 - 15:15
Room: CAR 0.05/0.06 (aula)
Contributions

14:00 Investigations into the effect of gamma irradiation on the leakage current of 130nm readout chips for the ATLAS ITk Silicon Strip Detector - Ricardo Woelker (University of Oxford (GB))

14:25 A Multi-Layer SEU Mitigation Strategy to Improve FPGA Radiation Robustness for the ATLAS Upgrade - Xueye Hu (Umich)

14:50 Investigation of Proton Induced Radiation Effects in 0.15 µm CMOS Antifuse FPGA - Vlad-Mihai Placinta (Horia Hulubei National Institute for R&D in Physics and Nuclear Engineering (IFIN-HH RO))
15:15 Coffee break
Coffee break
15:15 - 15:45
Room: FBS 0.01/0.02 (Feestzaal)
15:45
15:45 - 16:30
Room: CAR 0.05/0.06 (aula)
Contributions

15:45 Low noise global shutter pixels and readout circuits for CMOS image sensors - Guy Meynants
16:35
16:35 - 17:00
Room: CAR 1.09 (aula)
Contributions

16:35 Upgrade of the CMS Barrel Muon Track Finder for HL-LHC featuring a Kalman Filter algorithm and an ATCA Host Processor with Ultrascale+ FPGAs - Georgios Karathanasis (National and Kapodistrian University of Athens (GR))
16:35 - 17:00
Room: CAR 0.05/0.06 (aula)
Contributions

16:35 28 nm high-k bulk digital circuit performance (SEU) after Heavy Ion exposure - Serena Mattiazzo (Universita e INFN, Padova (IT))
17:00 Posters session - 2 Other
Posters session - 2 Other
17:00 - 18:30
Room: FBS 0.01/0.02 (Feestzaal)
Contributions

17:00 GSPS: a 1 GS/s sampling digitiser designed with interleaved architecture for the LaBr3 detectors of the FAMU experiments. - Riccardo Travaglini (INFN, Bologna (IT))

17:15 A bipolar shaping amplifier for low background alpha/beta counters with silicon detectors. - Sam Thys (Mirion Technologies (CANBERRA Olen))

17:30 Optimizing Time Resolution for Large Area Silicon Photomultipliers - Sergio Gómez Fernández (University of Barcelona - Institute of Cosmos Sciences (ICCUB))
Posters session - 2 Power, Grounding and Shielding
Posters session - 2 Power, Grounding and Shielding
17:00 - 18:30
Room: FBS 0.01/0.02 (Feestzaal)
Contributions

17:00 Hybrid GaN and CMOS integrated module radiation hard DC-DC converter - Esko Mikkola (Alphacore, Inc.)

17:15 High-Voltage Silicon JFET for HV Multiplexing for the ATLAS MicroStrip Staves - Gabriele Giacomini (Brookhaven National Laboratory)
Posters session - 2 Production, Testing and Reliability
Posters session - 2 Production, Testing and Reliability
17:00 - 18:30
Room: FBS 0.01/0.02 (Feestzaal)
Contributions

17:00 Front-end hybrids for the strip-strip modules of the CMS Outer Tracker Upgrade - Tomasz Gadek (CERN)

17:15 MrRobot: an automated ASIC testing rig - Adrian Casajus Ramo (University of Barcelona (ES))

17:30 Production and Quality Assurance of Mu2e Silicon PhotoMultipliers - Luca Morescalchi (INFN - Pisa)

18:00 Quality control and reliability testing of the front‐end electronics production for the upgrade of the LHCb RICH detectors - Ilaria Neri (Universita e INFN, Ferrara (IT))

18:15 Front-end Electronics of the Forward Strip Detector for the ATLAS HL-LHC Upgrade - Carlos Garcia Argos (Albert-Ludwigs-Universitaet Freiburg (DE))

18:15 First Double-Sided End-Cap Strip Module for the ATLAS High-Luminosity Upgrade - Liv Wiik-Fuchs (Albert Ludwigs Universitaet Freiburg (DE))
Posters session - 2 Radiation Tolerant Components and Systems
Posters session - 2 Radiation Tolerant Components and Systems
17:00 - 18:30
Room: FBS 0.01/0.02 (Feestzaal)
Contributions

17:15 Characterization of Soft Error Rate against Memory Elements Spacing and Clock Skew in Logic with Triple Modular Redundancy in a 65nm Process - Sandeep Miryala (Fermi National Accelerator Laboratory)

17:45 The Upgraded Microstrip Silicon Sensor Characterisation Facility  of the University of Sheffield - Evangelos Kourlitis (University of Sheffield (GB))

18:00 Delay Locked Loop for use in a time-to-digital converter with quick recovery and low hysteresis - Bjorn Van Bockel (KU Leuven (BE))

18:15 Radiation tests and production test strategy for the ALICE TOF readout upgrade board - Davide Falchieri (INFN Bologna)

18:15 ATLAS Tile Calorimeter Link Daughter Board - Eduardo Valdes Santurio (Stockholm University (SE))

18:15 Investigation of Single Event Latch-up effects in the ALICE SAMPA ASIC - Sohail Musa Mahmood (University of Oslo (NO))

18:15 Radiation tolerant conditioning electronics for vacuum measurements - Nikolaos Chatzigeorgiou (CERN)
Posters session - 2 Systems, Planning, Installation, Commissioning and Running Experience
Posters session - 2 Systems, Planning, Installation, Commissioning and Running Experience
17:00 - 18:30
Room: FBS 0.01/0.02 (Feestzaal)
Contributions

17:00 The WaveCatcher systems: a family of powerful and low cost digitizers. - Dominique Breton (CNRS/LAL Orsay (FR))

17:30 ATLAS Phase-II-Upgrade Pixel Demonstrator Read-out - Eric Buschmann (Georg August Universitaet Goettingen (DE))

18:00 Novel Si-Sensor technology for high resolution and high repetition-rate experiments at accelerator facilities - Meghana Mahaveer Patil (KIT)

18:15 ATLAS Phase-II-Upgrade Pixel Data Transmission Development - Joern Grosse-Knetter (Georg August Universitaet Goettingen (DE))

18:15 New 63U ATCA rack: thermal performances and integration challenge - Michal Tomasz Kalinowski ( Tadeusz Kosciuszko Cracow University of technology (PL))

18:15 The CMS phase 2 ECAL front end electronics upgrade - Pierre-Anne Bausson (Université Paris-Saclay (FR))

18:15 Design of the Back end card for the JUNO experiment - yifan yang (iihe)

18:15 The PaDiWa-AMPS2 TDC and QDC front-end electronics for the HADES Electromagnetic Calorimeter - Adrian Rost (Technische Universität Darmstadt (DE))

18:15 The Embedded Local Monitor Board upgrade proposals - Kamil Szymon Nicpon (CERN)

18:15 CMS ECAL Upgrade Front End card: design and prototype test results - Alexander Singovski (University of Minnesota (US))

18:15 Design and Test of the Analog to Digital Converter Unit for the JUNO Readout Electronics - Jun Hu

18:15 Design and performance of CMS Muon Triple-GEM Detector Control System - Gilles De Lentdecker (Universite Libre de Bruxelles (BE))

18:15 CMS Drift Tubes Readout Phase 1 Upgrade - Alvaro Navarro Tobar (Centro de Investigaciones Energéti cas Medioambientales y Tecno)

18:15 Electronics Developments for Phase-2 Upgrade of CMS Drift Tubes - Andrea Triossi (Centro de Investigaciones Energéti cas Medioambientales y Tecno)

18:15 Level-1 Data Driver Card - A high bandwidth radiation tolerant aggregator board for detectors - Panagiotis Gkountoumis (National Technical Univ. of Athens (GR))

18:15 FPC design and testing for the High-Granularity Timing Detector for the Phase II upgrade of the ATLAS calorimeter system - Maria Robles Manzano (Johannes Gutenberg Universitaet Mainz (DE))
Posters session - 2 Trigger
Posters session - 2 Trigger
17:00 - 18:30
Room: FBS 0.01/0.02 (Feestzaal)
Contributions

17:00 Towards a heterogeneous High Level Trigger farm for CMS - Andrea Bocci (CERN)

17:15 Input Mezzanine Board for the Fast Tracker(FTK) at ATLAS - Takashi Mitani (Waseda University (JP))

17:30 Development and testing of a Trigger Processor Card based on a Kintex Ultrascale FPGA - Stavros Mallios (University of Ioannina (GR))

17:45 Study of Retina Algorithm on FPGA for Fast Tracking - Wendi Deng (Universite Libre de Bruxelles (BE))

18:00 New development in the CMS ECAL Level-1 trigger system to meet the challenges of LHC Run 2 - Floris Thiant (LLR - Ecole Polytechnique )

18:15 Ultraflex: An ATCA Prototype Board for the CMS Phase 2 Tracker Upgrade - Luis Ardila (KIT-IPE)

18:15 A Lightweight First-Level Muon Track Trigger for Future Hadron Collider Experiments - Davide Cieri (Max-Planck-Institut fur Physik (DE))

18:15 The CMS Level-1 muon triggers for the LHC Run II - Jaana Heikkilae (Helsinki Institute of Physics (FI))

18:15 A novel 4D fast track finding system using precise space and time information of the hit - Paolo Gandini (INFN Milano (IT))
Friday 21 September 2018
09:00
09:00 - 10:15
Room: CAR 0.05/0.06 (aula)
Contributions

09:25 Development of the monolithic ``MALTA'' CMOS sensor for the ATLAS ITK outer pixel layer - Bojan Hiti (Jozef Stefan Institute (SI))

09:50 COLDATA PLL and Serializer: A 2.56GHz Phase Locked Loop (PLL) and a 1.28Gbps 10:1 Serializer Capable of Operating at Cryogenic Temperature - Xiaoran Wang (SMU)
09:00 - 10:15
Room: CAR 1.09 (aula)
Contributions

09:00 Operation of the CMS Level-1 calorimeter trigger in high pileup conditions and motivations for Phase 2 - Aaron Bundock (Imperial College (GB))

09:25 The Phase-I Trigger Readout Electronics Upgrade of the ATLAS Liquid Argon Calorimeters - Kenta Uno (University of Tokyo (JP))

09:50 Service hybrids for the silicon strip modules of the CMS Phase-2 Outer Tracker upgrade - Katja Klein (Rheinisch Westfaelische Tech. Hoch. (DE))
10:15 Coffee break
Coffee break
10:15 - 10:45
Room: FBS 0.01/0.02 (Feestzaal)
10:45
10:45 - 11:30
Room: CAR 0.05/0.06 (aula)
Contributions

10:45 Advanced packaging technologies for demanding HEP applications. - Stéphane Bellenger
11:30

11:30 - 11:55
Room: CAR 0.05/0.06 (aula)

11:55

11:55 - 12:20
Room: CAR 0.05/0.06 (aula)

12:20 Lunch
Lunch
12:20 - 13:00
13:00
13:00 - 16:10
Room: CAR 1.09 (aula)
Contributions

13:00 TUTORIAL: Bits on Speed! – SERDES Design in Advanced CMOS Technologies - Cervelli Giovanni (Miromico, Switzerland ) D. Gardellini (Miromico, Switzerland )

15:10 TUTORIAL: lpGBT, a user's perspective - Paulo Rodrigues Simoes Moreira (CERN)

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