TWEPP 2018 Topical Workshop on Electronics for Particle Physics

Session

Programmable Logic, Design Tools and Methods

20 Sept 2018, 12:00

Conveners

Programmable Logic, Design Tools and Methods

• Gregory Michiel Iles (Imperial College (GB))

Programmable Logic, Design Tools and Methods

• Jorgen Christiansen (CERN)

Programmable Logic, Design Tools and Methods

• Jorgen Christiansen (CERN)

36. Sorting of STS-XYTER2 data for microslice building for CBM experiment

Marek Gumiński (Warsaw Uniwesity of Technology)

20/09/2018, 12:00

Programmable Logic, Design Tools and Methods

Oral

The readout system for triggerless High Energy Physics experiments, recently under intense development, contain an aggregation and data processing modules. They are responsible for collecting data from multiple input links, pre-processing and packaging them into containers for the event selection module located next in the readout chain.
The presented article discusses design considerations...

78. Improved tapped-delay-line Time-to-Digital Converter (TDC) with time-over-threshold (TOT) measurement for a new generation of Resistive Plate Chamber (RPC) detectors

Mr Xiushan CHEN (Institut de Physique Nucléaire de Lyon, Université de Lyon, Université de Lyon 1, CNRS-IN2P3, UMR 5822)

20/09/2018, 14:00

Programmable Logic, Design Tools and Methods

Oral

For developing a new generation of Resistive Plate Chamber detectors, we present here an improved tapped-delay-line Time-to-Digital Converter (TDC) for time-over-threshold (TOT) measurement, which has been implemented on a low-end, 28nm cyclone V-GT FPGA. Our proposed approaches include signal reshaping and optimized routing, as well as edge-detecting and encoding only a small segment of...

61. A collaborative HDL management tool for ATLAS L1Calo upgrades

Francesco Gonnella (University of Birmingham (GB))

20/09/2018, 14:25

Programmable Logic, Design Tools and Methods

Oral

Coordinating firmware development among many international collaborators is becoming a very widespread problem in particle physics. Guaranteeing firmware synthesis with P&R reproducibility and assuring traceability of binary files is paramount. Our HDL managing tool tackles these issues by exploiting advanced Git features and being deeply integrated with HDL IDE, with particular attention to...

13. FELIX: developing a new detector interface for ATLAS trigger and readout

Gokhan Unel (University of California Irvine (US))

20/09/2018, 14:50

Programmable Logic, Design Tools and Methods

Oral

Starting during the upcoming major LHC shutdown (2019-2021), the ATLAS experiment at CERN will move to the Front-End Link eXchange (FELIX) system as the interface between the data acquisition system and the trigger and detector front-end electronics. FELIX will function as a router between custom serial links and a commodity switch network, which will use industry standard technologies to...

59. Upgrade of the CMS Barrel Muon Track Finder for HL-LHC featuring a Kalman Filter algorithm and an ATCA Host Processor with Ultrascale+ FPGAs

Georgios Karathanasis (National and Kapodistrian University of Athens (GR))

20/09/2018, 16:35

Programmable Logic, Design Tools and Methods

Oral

The CMS Barrel Muon Track finder is a component of the Level-1 Trigger which performs track reconstruction and momentum measurement in the central region of the CMS experiment.
The current algorithm uses precalculated look-up tables to estimate the track parameters. A new approach will be presented deploying a Kalman filter algorithm that
exploits DSP resources in modern FPGAs, is prototyped...