Welcome

• Erika Garutti (Hamburg University (DE))

Room: Auditorium

RD50 – recent news

• Michael Moll (CERN)

Room: Auditorium

Very thin LGAD for tracking particles at fluences above 5E15 n/cm2 Room: Auditorium In this contribution, we explore the possibility of using very thin LGAD (~ 20 microns thick) as tracking detector at very high fluences. Current silicon detectors generate signals at most of 1-2 fC: we believe that very thin LGAD can provide signals of this magnitude via the interplay of gain in the gain layer and gain in the bulk. Up to fluences of 1-2E15 n/cm2, thin LGAD still have a gain of ~ 10 while at higher fluences the increased bias voltage will trigger the onset of multiplication on the bulk. Key to this idea is the possibility of a reliable, high-density LGAD design able to hold large bias voltages (~ 500V)

High-Density Low Gain Avalanche Detectors (HD-LGAD)

• Giovanni Paternoster (Fondazione Bruno KEssler)

Room: Auditorium The FBK, Universities and INFN of Turin and Trento groups are proposing an R&D project to RD50 collaboration, aimed at developing a new detector structure named high-density Low Gain Avalanche Detectors (HD-LGAD). The novel structure consists in a thin LGAD sensor with segmented multiplication junction, featuring small pixels and a reduced inter-pixel border region. Standard LGADs made on thin (30-50 µm) substrates recently demonstrated a superb timing resolution down to ∼30 ps. On the other hand, the pixel size of such detectors is typically limited to 0.5-1 mm, due to the presence of an inter-pixel region (~60-70 µm wide), which hosts the pixel guard ring and the junction termination edge. In such a region, the gain is completely suppressed and, consequently, the pixel fill factor (FF) is strongly reduced. The final goal of the proposed project is to produce pixel arrays and micro-strips sensors with pixels and strips dimension down to 100 µm, keeping at the same time the FF higher than 80%. We are investigating different strategies to reduce the inter-pixel border region: i) re-design the pixel guard-ring by using shallow trench isolation (STI); ii) improve the microfabrication process to reduce the feature size of all the structures at the pixel border (trenches, contacts, field plates). In this presentation, we will describe the project goals and motivations and we will present the first simulation results on the new designed structures.