Jul 21 – 25, 2019
Connecticut Convention Center, Level 6
US/Eastern timezone

M3Or3A-04 [Invited]: Process for scalable fabrication of low AC loss HTS conductors

Jul 24, 2019, 3:30 PM
Level 6, Room 15-16

Level 6, Room 15-16


Joseph Prestigiacomo (US Naval Research Laboratory)


A scalable process has been developed to fabricate low AC loss cable from second generation high temperature superconducting (2G HTS) coated conductors with an emulated Rutherford twisted conductor topology. The process uses an indexed tape design to precisely align separate YBCO tapes to form a single tape structure making it compatible with a reel-to-reel production process and involves a combination of three methods: (1) the use of laser lithography to striate 2G HTS tapes into a pattern of isolated diagonal filaments, (2) the precise alignment and decal bonding of a pattern of solder preforms to the filament edge contact areas, and (3) the alignment and bonding of a top and bottom HTS tape with a thin intervening adhesive layer that provides mechanical adhesion and electrical isolation between adjacent bonds and the interior where filament transposition occurs. The observation of a resistive critical current transition in the fully fabricated transposed striated HTS conductor indicates that all bonds were well formed and the superconducting current path was restricted to the filaments.

Primary authors

Joseph Prestigiacomo (US Naval Research Laboratory) Mr Raymond Auyeung (US Naval Research Laboratory) Dr Michael Osofsky (US Naval Research Laboratory)

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