Jul 21 – 25, 2019
Connecticut Convention Center, Level 6
US/Eastern timezone

M2Po2D-03 [45]: Effect of Interfacial Resistance at Superconductor-stabilizer layer on the Temperature distribution among 2G HTS Tape used for Superconducting Power Applications

Jul 23, 2019, 1:30 PM
Level 6, Cryo Expo Exhibit Hall

Level 6, Cryo Expo Exhibit Hall


Abhinav Kumar (Lovely Professional University, Phagwara)


Second generation high temperature superconducting (HTS) tapes have been widely employed in design and development of Superconducting Fault Current Limiters (SFCL) and Superconducting Magnetic Energy Storage (SMES) systems. These systems are generally operated near the critical currents of the coated conductors to get the maximum outcomes thus there will be situations when the hot spots may occur that may lead to quenching of superconductor. Various studies have been proposed where attempts have been made to increase the normal zone propagation velocity (NZPV) to avoid the initiation of hot spots. Large NZPV can be achieved by varying the interfacial resistance among the superconductor and stabilizer layer.
In the present study, a slight modification has been done in the architecture of the tape where different interfacial resistances have been employed to estimate the temperature distribution among HTS tape having 10mm length. It has been noticed that large temperature gradients exists between a tape length of 7 to 10mm and a significant temperature rise has been observed for different interfacial resistances.

Primary author

Abhinav Kumar (Lovely Professional University, Phagwara)


Dr Ashish Agrawal (School of Mechanical Engineering ) Dr JV Muruga Lal Jeyan (School of Mechanical Engineering)

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