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Description
To handle the increasing number of cancer patients, China has built its own carbon ion therapy facility. The beam monitoring system in the therapy facility ensures the beam energy deposition can accurately cover the dedicated tumor region. The full image of the beam energy deposition is needed for accurate beam calibration, thus a Monolithic Active Pixel Sensor (MAPS), which can provide the energy deposition in each pixel, is being designed in a 130nm CMOS process. As the key part in realizing this MAPS with full-image output, a 5-bit column-parallel ADC with a novel architecture has been designed to serve the pixels in each column. To respond to the restrict constraints of power dissipation, size, working speed and accuracy for the MAPS, the column-parallel ADC combines the dedicated sample phase and the signal conversion phase into a single phase. Moreover, the column-parallel ADC has a high tolerance to the offset of the comparators in the ADC by generating 1.5-bit in every stage. Each column-parallel ADC covers a small area of 100 μm × 200 μm, consumes low power at 3.3 V supply and provides the sampling rate of 10 MS/s with the dynamic range of 1000 mV. Its DNL and INL are 0.04 LSB and 0.256 LSB, respectively. This paper concerns the design, optimization and performance of the column-parallel ADC.
