Speaker
Description
Challenging requirements are imposed on the vertex and tracking system of the detector for the proposed future Compact Linear Collider CLIC. A temporal resolution of a few ns and a spatial resolution of a few $\mu $m need to be achieved simultaneously with a material budget of down to less than one percent per detection layer. Various silicon pixel detector technologies are under investigation in a broad technology R&D programme. CLICpix2, a 65 nm CMOS chip with a pixel pitch of 25 $\mu$m, has been designed to fulfil the requirements of the CLIC vertex detector. Hybrid assemblies with CLICpix2 chips bump-bonded to thin planar active edge sensors have been produced and characterised in beam tests. The large collection electrode ATLASpix monolithic CMOS chip with a pixel size of 40 $\mu$m x 130 $\mu$m has been produced in a 180 nm High-Voltage CMOS process and is under study for the CLIC tracker. Moreover, a small collection-electrode monolithic CMOS chip with a pixel size of 30 $\mu$m x 300 $\mu$m, the CLICTD, has been developed for the CLIC tracker. This novel chip design with sub-pixel segmentation of the analogue frontend is implemented in two variants of a modified 180 nm CMOS imaging process, optimised for fast collection and high spatial resolution. These different detector prototypes are tested using the 6 GeV electron beam at DESY and a EUDET-type reference telescope with the EUDAQ2 DAQ framework. A Timepix3 plane has been integrated in the telescope setup, allowing for a track-time reference of ~1 ns. The different Devices Under Test are read out by the Caribou DAQ system, a versatile data acquisition system based on a System-On-Chip FPGA architecture. Details of the test-beam data-taking setup as well as analysis results will be presented in this talk.
