Speaker
Description
The expected increase of the particle flux at the high luminosity phase of the LHC (HL-LHC) with instantaneous luminosities up to L ≃ 7.5×10^34 cm−2 s-1 will have a severe impact on the ATLAS detector performance. The pile-up is expected to increase on average to 200 interactions per bunch crossing. The reconstruction and trigger performance for electrons, photons as well as jets and transverse missing energy will be severely degraded in the end-cap and forward region, where the liquid Argon based electromagnetic calorimeter has coarser granularity and the inner tracker has poorer momentum resolution compared to the central region. A High Granularity Timing Detector (HGTD) is proposed in front of the liquid Argon end-cap calorimeters for pile-up mitigation and for bunch per bunch luminosity measurements.
This detector should cover the pseudo-rapidity range from 2.4 to about 4.0. Two silicon sensors double sided layers are foreseen to provide a precision timing information for minimum ionizing particle with a time resolution better than 50 ps per hit (i.e 30 ps per track) in order to assign the particle to the correct vertex. Each readout cell has a transverse size of 1.3×1.3 mm2 leading to a highly granular detector with about 3 millions of readout electronics channels. Low Gain Avalanche Detectors (LGAD) technology has been chosen as it provides an internal gain good enough to reach large signal over noise ratio needed for excellent time resolution.
Several test-beam campaigns have been conducted at CERN SPS H6 and at DESY T22 beamlines in the past 3 years. Proton and neutron irradiated LGAD prototypes for the HGTD were tested from different technologies and manufacturers. Single pads and 2×2 arrays with a pad size of 1×1 mm2 are compared for achieved collected charge, timing performance, post-irradiation efficiency and uniformity at fluences up to 2.5e15 neq/cm2. A time resolution of < 50 ps is observed in most cases, while integrating timing information to the EUDET system allows for a surface resolution of less than 50 μm. The triggering architecture, picosecond synchronization scheme and analysis logic will also be presented as well as application-specific electronics and components.
