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27 September 2004 to 1 October 2004
Interlaken, Switzerland
Europe/Zurich timezone

The Architecture of the ZEUS Second Level Global Tracking Trigger

27 Sept 2004, 14:20
20m
Jungfrau (Interlaken, Switzerland)

Jungfrau

Interlaken, Switzerland

oral presentation Track 1 - Online Computing Online Computing

Speaker

M. Sutton (UNIVERSITY COLLEGE LONDON)

Description

The architecture and performance of the ZEUS Global Track Trigger (GTT) are described. Data from the ZEUS silicon Micro Vertex detector's HELIX readout chips, corresponding to 200k channels, are digitized by 3 crates of ADCs and PowerPC VME board computers push cluster data for second level trigger processing and strip data for event building via Fast and GigaEthernet network connections. Additional tracking information from the central tracking chamber and forward straw tube tracker are interfaced into the 12 dual CPU PC farm of the global track trigger where track and vertex finding is performed by separately threaded algorithms. The system is data driven at the ZEUS first level trigger rates <500Hz, generating trigger results after a mean time of 10ms. The GTT integration into the ZEUS second level trigger and recent performance are reviewed.

Primary authors

M. Sutton (UNIVERSITY COLLEGE LONDON) ZEUS GTT group

Presentation materials