Current status of the End-of-Substructure (EoS) card project for the ATLAS Strip Tracker Upgrade using final ASICs

23 Sept 2022, 09:20
20m
Terminus Forum

Terminus Forum

Oral Production, Testing and Reliability Production, Testing and Reliability

Speaker

Peter Goettlicher (Deutsches Elektronen-Synchrotron (DE))

Description

The building blocks of the ATLAS Strip Tracker for HL-LHC are modules that host silicon sensors and front-end electronics. The modules are mounted on carbon-fibre substructures hosting up to 14 modules per side. An End-of-Substructure (EoS) card on each substructure side connects up to 28 differential data lines at 640 Mbit/s to lpGBT and VL+ ASICs that provide data serialisation and 10 GBit/s optical data transmission to the off-detector systems respectively. We present the final EoS electronics design, integration aspects, and results from recent quality assurance tests with final lpGBTv1 and VL+ ASICs from CERN.

Summary (500 words)

The silicon tracker of the ATLAS experiment will be upgraded for the upcoming High-Luminosity Upgrade of the LHC (HL-LHC). The main building blocks of the new strip tracker are modules that consist of silicon sensors and hybrid PCBs hosting the read-out ASICs. The modules are mounted on rigid carbon-fibre substructures, known as staves in the central barrel region and petals in the end-cap regions, that provide common services to all the modules. At the end of each stave or petal side, a so-called End-of-Substructure (EoS) card facilitates the transfer of data, power, and control signals between the modules and the off-detector systems. The module front-end electronics transfer data to the EoS card on 640 Mbit/s differential lines. The EoS connects up to 28 data lines to one or two lpGBT chips that provide data serialisation and uses a 10 GBit/s versatile optical link (VL+) to transmit signals to the off-detector systems. The lpGBT also recovers the LHC clock on the downlink and generates clock and control signals for the modules. To meet the tight integration requirements in the detector, several different EoS card designs are needed. Custom-made holders and clamps are produced to guide cables and optical fibres as well as to shield the sensors from the opto-electric system. Here we present the production-ready EoS card’s electronic design integrating final lpGBTv1 and VL+ ASICs from CERN, as well as results from recent quality assurance tests including detailed characterisation of the opto-electronics system by its bit error rate, jitter, and eye diagram representation. Since each EoS sits at a single-point-of-failure for an entire stave or petal side, a dedicated quality control (QC) procedure for the production has been developed. An overview of the QC will also be presented.

Primary authors

Artur Lorenz Boebel (Deutsches Elektronen-Synchrotron (DE)) Lars Rickard Strom (Deutsches Elektronen-Synchrotron (DE)) Harald Ceslik (Deutsches Elektronen-Synchrotron (DE)) Ingrid-Maria Gregor (DESY & Bonn University) James Michael Keaveney (University of Cape Town (ZA)) Jan Oechsle (University of Copenhagen (DK)) Janet Ruth Wyngaard (University of Notre Dame (US)) Marcel Stanitzki (Deutsches Elektronen-Synchrotron (DE)) Max Nikoi Van Der Merwe (University of Cape Town (ZA)) Mogens Dam (University of Copenhagen (DK)) Peter Goettlicher (Deutsches Elektronen-Synchrotron (DE)) Sergio Diez Cornell (Deutsches Elektronen-Synchrotron (DESY)) Stefan Schmitt (Deutsches Elektronen-Synchrotron (DE))

Presentation materials