Speaker
Description
The CMS BRIL project upgrades its instrumentation for the Phase-2 detector to provide high-precision bunch-by-bunch luminosity and beam-induced background measurements. A part of the CMS Inner Tracker - the Tracker Endcap Pixel Detector (TEPX) - will allocate a fraction of the read-out bandwidth for luminometry. In order to be used for luminosity measurement, TEPX will require a dedicated trigger distribution system, while the raw data will be processed by a real-time on-FPGA pixel cluster counting algorithm. The most recent status of both developments will be presented.
Summary (500 words)
The High-Luminosity LHC is expected to provide instantaneous luminosity a factor of five larger than provided by the existing accelerator system. This enables better precision for physics measurements, but also implies higher radiation levels. The precision target of the luminosity measurements is 2% online and 1% with final calibration. Moreover, the upgraded layout of the CMS Tracker also necessitates the replacement of the currently operated dedicated luminosity detectors. The BRIL Phase-2 strategy relies on the construction of a dedicated luminometer as well as on the use of trigger primitives generated by various CMS subsystems to measure luminosity by installing a dedicated histogramming firmware module on the back-end FPGAs. The Tracker Endcap Pixel Detector (TEPX) does not provide trigger primitives and features triggered read-out. However, TEPX modules are designed to allow a trigger bandwidth of up to 1 MHz, while physics trigger rates of only 750 kHz are expected. This allows it to allocate additional bandwidth (+10% amounting to 75 kHz) to luminosity triggers. A dedicated luminosity trigger distribution system, also referred to as BRIL Trigger Board (BTB) will be built based on the Phase-2 ATCA hardware. For each group of TEPX modules, triggered luminosity data will be acquired by a back-end card and forwarded to a luminosity processor, both based on the Apollo ATCA platform. Each luminosity processor will be running an instance of a pixel cluster counting algorithm for each CMS Read-Out Chip (CROC) connected to the ATCA card. Cluster counts as well as error flags will be accumulated in histograms and then forwarded to the BRIL online software for final processing. This architecture will allow BRIL to include TEPX in the luminosity measurement infrastructure. In addition, a part of TEPX, known as Disk 4 Ring 1 (D4R1), will not be used for tracking due to the lack of a sufficient number of tracking points above an absolute pseudorapidity of 4 and therefore will be dedicated entirely to the BRIL project. This opens a potential to use the full trigger bandwidth for luminosity measurement. The independence of the system will also allow BRIL to use it for the beam-induced background measurements even when CMS is not in data-taking mode. The latter implies the requirement for the TEPX D4R1 front-end and back-end to run during the LHC acceleration cycles, when the bunch clock frequency is not fixed. A set of proof-of-principle algorithms has been developed and presented in the TWEPP2021, and also described in the technical design report dedicated to the Phase-2 Upgrade of the BRIL detectors,. The most recent developments towards the final versions of the BRIL Trigger Board and the pixel clustering FPGA firmware will be presented.
