Session

Invited

20 Sept 2022, 10:30

Conveners

Invited

  • Alex Kluge (CERN)

Invited

  • Ken Wyllie (CERN)

Invited

  • Johan Alme (University of Bergen (NO))

Invited

  • Alex Kluge (CERN)

Invited

  • Francois Vasey (CERN)

Invited: ECFA roadmap implementation for future R&D in electronics

  • Jean-Pierre Cachemiche (Centre National de la Recherche Scientifique (FR))

Presentation materials

  1. Werner Riegler (CERN)
    20/09/2022, 10:30
    Oral
  2. Alessandro Cardini (INFN Cagliari, Italy)
    20/09/2022, 15:30
    Oral

    Measuring charged-particles with 10ps time resolution using innovative 3D trench-type silicon pixel sensors

    Future collider experiments operating at very high instantaneous luminosity will greatly benefit in using detectors with excellent time resolution to facilitate event reconstruction. As an example, when the LHCb experiment will operate at 1.5x1034/cm/s after its Upgrade2, 2000 tracks...

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  3. Espen Tallaksen
    21/09/2022, 10:30

    The UVVM (Universal VHDL Verification Methodology) is the fastest growing FPGA verification methodology world-wide - independent of language, and number 1 for VHDL. Furthermore, VHDL is used by 50% of all FPGA designers, and between 80% and 90% of all FPGA designers in Europe. Thus UVVM has become a very important verification methodology for FPGA designers, and in fact also for quite a few...

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  4. Michael Haehnle
    22/09/2022, 10:30
    Oral

    A short trip into the world of innovation, especially in the high-tech sector.

    Why is innovation important, what are the drivers and why is it so often not the established players who innovate? Let’s have a look at different industries and discover common challenges …


    Michael Hähnle attained his master’s degree followed by a doctoral degree at the Vienna University of Economics...

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  5. Eduardo Brandao De Souza Mendes (CERN)
    22/09/2022, 15:30
    Optoelectronics and Links
    Oral

    The LHC phase-2 upgrades will pose unprecedent challenges in terms of timing stability to the clock delivered to thousands of nodes in an experiment. Slow phase variations could dominate the overall timing stability in a clock recovered from a high-speed optical link.
    The TCLink is an integrated protocol agnostic FPGA core that can monitor and correct slow phase variations in high-speed...

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  6. Francois Vasey (CERN)
    23/09/2022, 10:30
    Oral

    Abstract
    This presentation will review the main recommendations of the 2021 ECFA detector R&D roadmap. It will highlight their potential impact on long-term R&D for electronics and outline the envisaged implementation scenario.

    Biography
    Francois Vasey holds an electronics engineering degree from ETH-Zurich and a PhD degree in optoelectronics from EPF-Lausanne. He joined CERN in 1994 to...

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