TWEPP 2011 Topical Workshop on Electronics for Particle Physics

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MUG

P8 TOPICAL - Level-1 track triggers for the ATLAS high luminosity upgrade

P9 TOPICAL - Upgrade of the CMS tracker with Tracking Trigger

Plenary 6 - Organic and Printed Large-area Electronics: Disruptive Technologies for Innovative Applications

Plenary 7 - Radiation Damage to Electronics at the LHC – A First Analysis

Plenary 5 - Silicon photonic devices

A5a - Packaging and Interconnects

B5a - Optoelectronics and Links

B5b - Optoelectronics and Links

B3b - Programmable Logic - Systems

A5b - Packaging and Interconnects - Radiation tolerant components and systems

B1b - Systems, planning, installation, commissioning and running experience

A3b - Trigger

POWER WG

A1b - ASICs

Opening 1

Welcome

Plenary 1 - Electronic Developments for the Experiments at the FAIR Facility

Opening 2

B1a - Systems, planning, installation, commissioning and running experience

A1a - ASICs

A2 - ASICs

Plenary 2 - Cryogenic Electronics for Very Large Liquid Argon Neutrino and Nucleon Decay Detectors

XTCA WG

B2 - Power, Grounding and Shielding

SEU WG

A3a - Trigger

Plenary 3 - Programmable Logic in the 21st Century. Where are we and where are we going?

B3a - Programmable Logic, design tools and methods

Plenary 4 - 3D integration of pixel detectors at VTT

B4 - Power, Grounding and Shielding

A4 - ASICs

OPTO WG

P12 - Opto WG Summary

P11 - Power WG Summary

P10 - xTCA WG Summary

Art & History of Vienna

TUTORIAL - Advanced Packaging (Part 2)

TUTORIAL - Advanced Packaging (Part 1)

Close out

P13 - MUG and SEU WG Summary

Include materials from selected sessions

Contributions*

3D integration of pixel detectors at VTT (in session "Plenary 4 - 3D integration of pixel detectors at VTT")

A 9-Channel, 100ps LSB Time-to-Digital Converter for the NA62 Gigatracker Readout ASIC (TDCpix) (in session "Posters")

A 32-Channel High Resolution (<15 ps RMS) Time-to-Digital Converter (TDC) in a Field Programmable Gate Array (FPGA) (in session "B3a - Programmable Logic, design tools and methods")

A CMOS 0.13 um Silicon Pixel Detector Readout ASIC for the PANDA experiment (in session "A1a - ASICs")

A DC-DC converter based powering scheme for the upgrade of the CMS pixel detector (in session "B4 - Power, Grounding and Shielding")

A demonstration of a Time Multiplexed Trigger for CMS (in session "A3b - Trigger")

A fast and low noise charge sensitive preamplifier in 90 nm CMOS technology (in session "Posters")

A front-end chip development for the sLHC CMS Silicon Strip Tracker (in session "Posters")

A Low-Power Wave Union TDC Implemented in FPGA (in session "B3a - Programmable Logic, design tools and methods")

A multichannel Time-to-Digital Converter (TDC) inside a Virtex-5 FPGA on the GANDALF module (in session "Posters")

A Network Architecture for Bidirectional Data Transfer in High-Energy Physics Experiments Using Electroabsorption Modulators (in session "B5a - Optoelectronics and Links")

A PowerPC-based control system for the ReadOut Driver module of the ATLAS IBL. (in session "Posters")

A prototype for the upgraded read out electronics of TileCal (in session "Posters")

A radiation tolerant 5 Gb/s Laser Driver in 130 nm CMOS technology. (in session "Posters")

A Readout System-on-Chip for a Cubic Kilometre Submarine Neutrino Telescope (in session "B3b - Programmable Logic - Systems")

A Reticle Size CMOS Pixel Sensor Dedicated to the STAR HFT Upgrade (in session "A4 - ASICs")

Access of 65nm technology through CERN (in session "MUG")

Advanced Packaging (Part 1) (in session "TUTORIAL - Advanced Packaging (Part 1)")

Advanced Packaging (Part 2) (in session "TUTORIAL - Advanced Packaging (Part 2)")

Advanced testing of the DEPFET minimatrix particle detector (in session "Posters")

AGET-SED : A 128-Channel Complete Data Acquisition system for solid state and gaseous detector (in session "Posters")

An Extended-Range Ethernet and Clock Distribution Circuit for Distributed Sensor Networks (in session "Posters")

An FPGA based demonstrator for a topological processor in the future ATLAS L1-Calo trigger (``GOLD'') (in session "Posters")

Architectural modeling of pixel readout chips Velopix and Timepix3 (in session "Posters")

Art & history of Vienna (in session "Art & History of Vienna")

AsAd, the Generic Electronics Front-End for Time Projection Chambers (in session "Posters")

ASPIC: LSST camera readout chip (in session "Posters")

Associative Memory design for the Fast TracKer processor (FTK) at ATLAS (in session "A1b - ASICs")

ATCA developments targeting ITER Fast Plant System Controllers (in session "XTCA WG")

ATLAS LArg: Status of the optical system / optical system upgrades and associated developments (in session "OPTO WG")

ATLAS Upgrade Strip Tracker Stavelets (in session "B2 - Power, Grounding and Shielding")

Bio-inspired vision (in session "Opening 2")

CERN irradiation studies (in session "OPTO WG")

Characterisation Of The NA62 GigaTracker End of Column Demonstrator Hybrid Pixel Detector (in session "B1b - Systems, planning, installation, commissioning and running experience")

Characterization of a commercial 65nm CMOS technology for SLHC applications. (in session "A5b - Packaging and Interconnects - Radiation tolerant components and systems")

Close Out (in session "Close out")

CMS Calorimeter Trigger Phase 1 Upgrade (in session "A3b - Trigger")

CMS ECAL: Status of the optical system / optical system upgrades and associated developments (in session "OPTO WG")

CMS HCAL: Status of the optical system / optical system upgrades and associated developments (in session "OPTO WG")

CMS Tracker: Status of the optical system / optical system upgrades and associated developments (in session "OPTO WG")

Co-ordinated developments for bulk supplies? First discussion (in session "POWER WG")

Comparison of single event effect robustness of dual and triple well technologies at the 90 nm node (in session "Posters")

Conceptual Design of 3D Integrated Pixel Sensors for the Innermost Layer of the ILC Vertex Detector (in session "Posters")

Conceptual design of a MGy tolerant integrated signal conditioning circuit in 130 nm CMOS (in session "Posters")

Control, monitoring and safety aspects of power distribution in the ATLAS experiment (in session "B4 - Power, Grounding and Shielding")

Cryogenic digital data links for a liquid argon time projection chamber (in session "Posters")

Cryogenic Electronics for Very Large Liquid Argon Neutrino and Nucleon Decay Detectors (in session "Plenary 2 - Cryogenic Electronics for Very Large Liquid Argon Neutrino and Nucleon Decay Detectors")

DAQ systems for 10^8 channels detectors: design and system level simulations (in session "Posters")

Data acquisition electronics and reconstruction software for real time 3D track reconstruction within the MIMAC project (in session "B3b - Programmable Logic - Systems")

DC-DC converters with reduced mass for trackers at the HL-LHC (in session "Posters")

DC-DC developments: future plans (in session "POWER WG")

DC-DC modules: gained experience, material budget improvements, grounding aspects (in session "POWER WG")

DC/DC ASIC converters in 0.35um CMOS technology (in session "B2 - Power, Grounding and Shielding")

Design and Development of Electronics for the EuXFEL Clock and Control System (in session "Posters")

Design of a "Digital Atlas Vme Electronics" ( DAVE ) Module (in session "Posters")

Design of the Train Builder Data Acquisition System for the European-XFEL (in session "Posters")

Design Tools, Flows and Library Aspects during the FE-I4 Implementation on Silicon (in session "MUG")

Development and validation of a 64 channel front end ASIC for 3D directional detection with MIMAC (in session "Posters")

Development of a new Preamplifier-Shaper-Discriminator Chip for the ATLAS Muon Drift Tube Chambers in 130 nm IBM Technology (in session "A1b - ASICs")

Development of an ATCA IPMI Controller Mezzanine Board and its usage on an ATCA ROD Evaluator board for the ATLAS LAr upgrade (in session "B1b - Systems, planning, installation, commissioning and running experience")

Development of DC/DC converter in VHF band (in session "Posters")

Development of low power Phase-Locked Loop (PLL) and PLL-based serial transceiver (in session "A2 - ASICs")

Development of Low--Power Small--Area L--2L CMOS DACs for Multichannel Readout Systems (in session "Posters")

Developments at the UC Davis Facility for Interconnect Technologies (in session "Posters")

Discussion (in session "POWER WG")

Double-sided silicon strip modules for the ATLAS tracker upgrade in the High-Luminosity LHC collider (in session "Posters")

Efficient Signal Contitioning by an FIR Filter for Analog Signal Transmission over Long Lines (in session "Posters")

Electromagnetic Compatibility of CMS Infrastructure and Detector Electronics (in session "B4 - Power, Grounding and Shielding")

Electronic Developments for the Experiments at the FAIR Facility (in session "Plenary 1 - Electronic Developments for the Experiments at the FAIR Facility")

Electronics for Particle Physics in Austria (in session "Opening 1")

Electronics for the camera of the First G-APD Cherenkov Telescope (FACT) for ground based gamma-ray astronomy (in session "B1b - Systems, planning, installation, commissioning and running experience")

Evaluation of Emerging Parallel Optical Link Technology for High Energy Physics (in session "Posters")

FATALIC, a wide dynamic range integrated circuit for the tilecal VFE Atlas upgrade (in session "Posters")

FF-EMU: a radiation tolerant ASIC for the distribution of timing, trigger and control signals in the CMS End-Cap Muon detector (in session "A4 - ASICs")

First measurements of single event upsets in the readout control FPGA of the ALICE TPC detector (in session "Posters")

First test results with the Gigabit Link Interface Board (GLIB) (in session "B5b - Optoelectronics and Links")

Flexible system of the CMS ECAL OD electronics firmware update (in session "Posters")

FPGA Fault Tolerance for Embedded Systems (in session "SEU WG")

GEM400: A Front-End Readout chip based on Capacitor Switch Array for Pixel-based GEM Detector (in session "Posters")

GOSSIPO-4: an array of high resolution TDCs with a PLL control (in session "Posters")

Initial tests of CMS Binary Chip with Sensor (in session "Posters")

Integrated DC-DC converter in the FE-I4 (in session "POWER WG")

Introduction (in session "POWER WG")

Introduction (in session "SEU WG")

Introduction (in session "MUG")

Introduction to MicroHAL (in session "XTCA WG")

Introduction: What has been presented i March miniworkshop, what talks and posters are foreseen in opto session (in session "OPTO WG")

Introduction: What has been presented in March miniworkshop, what talks and posters are foreseen in opto session (in session "OPTO WG")

Irradiation of DEPFET-like transistors with CO-60 gamma source up to 10 MRad (in session "Posters")

KLauS - A Charge Readout and Fast Discrimination Chip for Silicon Photomultipliers (SiPMs) (in session "Posters")

Level-1 track triggers for the ATLAS high luminosity upgrade (in session "P8 TOPICAL - Level-1 track triggers for the ATLAS high luminosity upgrade")

LHCb: Status of the optical system / optical system upgrades and associated developments (in session "OPTO WG")

Low mass aluminium microstrips for data transmission in the Micro Vertex Detector of the Panda experiment. (in session "Posters")

Low Noise Front End ASIC with Current Mode Active Cooled Termination for the Upgrade of the LHCb Calorimeter (in session "A1b - ASICs")

Low Noise Preamplifier ASIC for the PANDA - Experiment (in session "Posters")

Microfluidic cooling for detectors and electronics (in session "A5a - Packaging and Interconnects")

MICROROC: MICROMEsh GAseous Structure Read-Out Chip (in session "Posters")

MicroTCA-based Global Trigger Upgrade project for the CMS experiment at LHC (in session "Posters")

MMC H/W & S/W (in session "XTCA WG")

Modelling radiation-effects and annealing in semiconductor lasers for use in future particle physics experiments (in session "Posters")

MUG - SEU (in session "P13 - MUG and SEU WG Summary")

nanoFIP: a radiation tolerant FPGA-based WorldFIP agent (in session "A5b - Packaging and Interconnects - Radiation tolerant components and systems")

New xTCA Developments at SLAC (by Ray Larsen) (in session "XTCA WG")

News on SEU in 90nm and 65nm (in session "SEU WG")

News on the 130nm technology support (in session "MUG")

Noise and radiation hardness of 65 nm CMOS transistors and pixel front-ends (in session "MUG")

Novel interconnect techniques for hybrid pixel detectors (in session "Posters")

Open Hardware for CERN’s Accelerator Control Systems (in session "Posters")

Opening (in session "XTCA WG")

Opto (in session "P12 - Opto WG Summary")

Organic and Printed Large-area Electronics: Disruptive Technologies for Innovative Applications (in session "Plenary 6 - Organic and Printed Large-area Electronics: Disruptive Technologies for Innovative Applications")

Particle Physics in Austria (in session "Opening 1")

Performance of the ATLAS Trigger System (in session "A3a - Trigger")

Perspectives for xTCA in ATLAS (in session "XTCA WG")

Perspectives for xTCA in CMS (in session "XTCA WG")

Power (in session "P11 - Power WG Summary")

Power Converters for Future LHC Experiments (in session "Posters")

Power Network impedance effects on noise emission of DC-DC converters (in session "Posters")

Power Supply and Pulsing Strategies for the International and Compact Linear Colliders (in session "Posters")

Programmable Logic in the 21st Century. Where are we and where are we going? (in session "Plenary 3 - Programmable Logic in the 21st Century. Where are we and where are we going?")

Progress on a Si-W ECAL Detection and Readout Interconnects (in session "A5a - Packaging and Interconnects")

Prototype Pixel Optohybrid for the CMS phase 1 upgraded Pixel Detector (in session "Posters")

Radiation Damage to Electronics at the LHC – A First Analysis (in session "Plenary 7 - Radiation Damage to Electronics at the LHC – A First Analysis")

Radiation Tolerance of Readout Electronics for Belle II (in session "A5b - Packaging and Interconnects - Radiation tolerant components and systems")

Radiation Tolerant Low Power 12-bit ADC in 130 nm CMOS Technology (in session "A4 - ASICs")

Recent progress in the development of 3D deep n-well CMOS MAPS (in session "Posters")

Redesign of the Back of Crate Card (BOC) for the ATLAS IBL (in session "Posters")

Reducing pixel-to-pixel disparities in Geiger mode avalanche photodiodes by using gated operation (in session "Posters")

Remote Access to Xilinx Programmable Devices in the CSC Endcap Muon Electronic System at CMS (in session "Posters")

Semiconductor Manufacturing in Austria (in session "Opening 2")

SEU measurements of the FEI4 chip (in session "SEU WG")

SEU protection insertion in Verilog for the ABCN project (in session "SEU WG")

SEU test of GBT prototype (in session "SEU WG")

Silicon photonic devices (in session "Plenary 5 - Silicon photonic devices")

Simplified MCH providing clock/controls/DAQ functions (in session "XTCA WG")

Single-Event Upset testing of the Versatile Transceiver (in session "Posters")

SKIROC2, a Front-end Chip designed to readout the E-Cal of ILC (in session "A2 - ASICs")

SLID-ICV interconnection technology for the ATLAS pixel upgrade at SLHC (in session "A5b - Packaging and Interconnects - Radiation tolerant components and systems")

SMU cryogenic tests (in session "OPTO WG")

SPACIROC: A Front-End Readout ASIC for the JEM-EUSO observatory (in session "Posters")

status and plans of the EMC CMS-tracker upgrade project (in session "POWER WG")

Status of the switched capacitor DC-DC converters for the upgraded LHC trackers (in session "POWER WG")

Studies for the detector control system of the new ATLAS Pixel detector (in session "Posters")

Study of the hybrid controller electronics for the nano-stabilisation of mechanical vibrations of CLIC quadrupoles (in session "B1a - Systems, planning, installation, commissioning and running experience")

TEL62: an integrated trigger and data acquisition board (in session "Posters")

Tests of ATLAS SCT Front-end Amplifier's ASIC Susceptibility to Beam Loss Scenario (in session "Posters")

The ALICE trigger system performance for p-p and Pb-Pb collisions (in session "A3a - Trigger")

THE ANTARES NEUTRINO DETECTOR INSTRUMENTATION (in session "B3b - Programmable Logic - Systems")

The CMS Binary Chip for microstrip tracker readout at the SLHC (in session "A1b - ASICs")

The Data Acquisition Card for the Large Pixel Detector at the European-XFEL (in session "B1a - Systems, planning, installation, commissioning and running experience")

The Data Handling Processor (DHP) for the DEPFET Pixel Vertex Detector at BelleII (in session "Posters")

The Electronics System of the ALFA Forward Detector for Luminosity Measurements in ATLAS (in session "B1b - Systems, planning, installation, commissioning and running experience")

The FE-I4 Pixel Readout System-on-Chip resubmission to accommodate the Fast Track IBL plans (in session "A1a - ASICs")

The Front-End Concentrator card for the RD51 Scalable Readout System (in session "Posters")

The MEMDYN chip: a new circular memory prototype for a plannar pixel sensors readout IC (in session "Posters")

The NA62 Liquid Krypton Calorimeter Readout Module (in session "Posters")

The Nectar GHz Digitizer ASIC for the Cherenkov Telescope Array (in session "Posters")

The New HADES Trigger and Data Acquisition System (in session "Posters")

The radiation induced attenuation of specific single-mode and multi-mode optical fibres below -20°C exposed to full HL-LHC doses at a dose rate of 1 kGy/hr (in session "B5b - Optoelectronics and Links")

The readout electronics for the hybrid avalanche photon detector (in session "Posters")

The Readout Electronics of the NA62 Large Angle Photon Veto System (in session "Posters")

The Shunt-LDO regulator for powering the upgraded ATLAS pixel detector (in session "B2 - Power, Grounding and Shielding")

The Sound Emission Board of the KM3NeT acoustic positioning system (in session "B3b - Programmable Logic - Systems")

The Versatile Link Common Project: Feasibility Report (in session "B5a - Optoelectronics and Links")

Thermal performance of carbon foams used as heat sink for the MVD-Panda. (in session "Posters")

Timing Distribution for the Belle II Data Acquistion System (in session "Posters")

Trigger-less readout electronics for the PANDA Electromagnetic Calorimeter (in session "Posters")

Universal single board tester for investigation of the avalanche photo detectors. (in session "Posters")

Update on the high speed serializer ASIC development for ATLAS Liquid Argon calorimeter upgrade (in session "Posters")

Upgrade of the ATLAS Level-1 Muon Trigger for High Luminosities Using the Precision Muon Drft Tube Chambers (in session "A3b - Trigger")

Upgrade of the CMS tracker with Tracking Trigger (in session "P9 TOPICAL - Upgrade of the CMS tracker with Tracking Trigger")

Upgrade plans for the CMS Trigger Drift Tube Track Finder electronics (in session "A3b - Trigger")

Use of FPGA embedded processors for high performance data compression (in session "Posters")

uTCA evaluation project (in session "XTCA WG")

VCSEL Reliability Studies and Development of Robust VCSEL Arrays (in session "B5b - Optoelectronics and Links")

Versatile Transceiver Development Status (in session "B5b - Optoelectronics and Links")

VHDL Implementation of Feature-Extraction Algorithm for the PANDA Electromagnetic Calorimeter (in session "Posters")

Welcome 1 (in session "Welcome")

Welcome 2 (in session "Welcome")

Welcome from Academy of Sciences (in session "Welcome")

Welcome to the Vienna University of Technology (in session "Welcome")

Wideband (500 MHz) 16 bit Dynamic Range Current Mode Preamplifier for the CTA cameras (in session "A2 - ASICs")

xTCA (in session "P10 - xTCA WG Summary")

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