Summary 500 words
For the Belle II spectrometer we are developing a proximity focusing ring imaging Cherenkov detector using aerogel as radiator. The RICH will enable efficent separation of kaons from pions in the wide range of particle momenta from 1 up to 4 GeV/c. The should detector fits in the small space between the drift chamber and the electromagnetic calorimeter inside a strong magnetic field of 1.5 T. The photon sensor should be able to detect the single photons with high efficiency and in addition it has to be resistant to high radiation doses (1012 neutrons/cm2 and 100 krad gammas in 10 years of operation ).
The baseline candidate is a Hybrid Avalanche Photon Detector (HAPD) with 144 channels. The sensor with outer dimensions of 76×76 mm2 has the geometrical acceptance of 67%. It contains four APD chips each one with 36 channels and pixel size of about 5 x 5 mm2. Cherenkov photons enter the sensor through the entrance window and generate photoelectrons in a bialkali photocathode. The photoelectrons are accelerated along the electric ﬁeld, with a typical voltage of
about 8 kV, and are directed on to the avalanche photo diode. In the diode, an additional bombardment gain of about 40 is obtained when the bias voltage is applied. A total of about 10000 electrons are collected at the sensor output. Around 500 HAPDs will be needed to cover the photon detector plane.
As well as the HAPDs, also the readout electronics has to operate in high magnetic field of 1.5 T and has to be radiation resistant. The readout boards should fit into the small volume of 50 mm × 76 mm × 76 mm behind the HAPD. The electronics has to allow remote monitoring and calibration and for triggering purposes it has to incorporate fast trigger algorithm.
The designed readout system consists of front end analog processing chains implemented in four ASIC circuits and an FPGA processing unit. The analog electronic front end consists of a charge sensitive preamplifier, a shaper and a threshold comparator. There are 36 analog channels integrated in one application specific integrated circuit (ASIC). To optimize the detector performance over its lifetime operation, parameters in the analog front end chain (gain, shaping time and offsets for each channel and a common threshold) will have to be adjusted. The expected equivalent noise is about 1200 electrons resulting in a signal to noise ratio of about 20. The FPGA processing unit processes the digitized signals and is responsible for the communication with the merger board, which processes data from several HAPDs and then sends them via optical cable to the common Belle II data acquisition system.
In the talk the requirements, a design, an implementation and bench tests of the readout electronics will be presented. The results will be compared with the expectations from the simulation. At the end the final performance will be discussed.