26–30 Sept 2011
Vienna, Austria
Europe/Zurich timezone

Session

Plenary 4 - 3D integration of pixel detectors at VTT

P4
28 Sept 2011, 14:00
Vienna, Austria

Vienna, Austria

<font face="Verdana" size="2"><b>Vienna University of Technology</b> Department of Electrical Engineering Gusshausstraße 27-29 1040 Vienna, Austria

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  1. Sami Vaehaenen
    28/09/2011, 14:00
    Packaging
    Oral
    Vertical (3D) integration using Through Silicon Vias (TSV) is gaining lot of attention within electronics industry. 3D integrated structures should enhance electrical performance of electronic devices, boost up device miniaturization, and enable new designs and stacks of device layers made with heterogeneous technologies. For pixel detectors, 3D integration using TSVs in combination with...
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