Speaker
Daniele Lattanzio
Description
At INFN-T1 we recently acquired some ARM nodes: initially they were given to LHC experiments to test workflow and submission pipelines. After some time, they were given as standard CPU resources, since the stability both of the nodes and of the code was production quality ready.
In this presentation we will describe all the activities that were necessary to enable users to run on ARM and will give some figures on performance, compared to x86 counterpart. In the end we will try to describe our point of view for the possible massive adoption of this architecture in Tier1 data centers.
Primary authors
Alessandro Pascolini
(Universita e INFN, Bologna (IT))
Mr
Andrea Chierici
(Universita e INFN, Bologna (IT))
DIEGO MICHELOTTO
(INFN - National Institute for Nuclear Physics)
Daniele Lattanzio
Francesco Noferini
(Universita e INFN, Bologna (IT))
Giusy Sergi
(INFN - CNAF)
