19–25 Oct 2024
Europe/Zurich timezone

Hardware acceleration for next-to-leading order event generation within MadGraph5_aMC@NLO

23 Oct 2024, 14:06
18m
Large Hall B

Large Hall B

Talk Track 5 - Simulation and analysis tools Parallel (Track 5)

Speaker

Zenny Jovi Joestar Wettersten (CERN)

Description

As the quality of experimental measurements increases, so does the need for Monte Carlo-generated simulated events — both with respect to total amount, and to their precision. In perturbative methods this involves the evaluation of higher order corrections to the leading order (LO) scattering amplitudes, including real emissions and loop corrections. Although experimental uncertainties today are larger than those of simulations, at the High Luminosity LHC experimental precision is expected to increase above the theoretical one for events generated below next-to-leading order (NLO) precision. As forecasted hardware resources do not meet CPU requirements for these simulation needs, speeding up NLO event generation is a necessity for particle physics research.

In recent years, collaborators across Europe and the United States have been working on CPU vectorisation of LO event generation within the MadGraph5_aMC@NLO framework, as well as porting it to GPUs, to major success. Recently, development has also started on vectorising NLO event generation. Due to the more complicated nature of NLO amplitudes this development faces several difficulties not accounted for in LO development. Nevertheless, this development seems promising, and a status report as well as the latest results will be presented in this contribution.

Primary authors

Andrea Valassi (CERN) Marco Zaro (Università degli Studi e INFN Milano (IT)) Olivier Mattelaer (UCLouvain) Stefan Roiser (CERN) Zenny Jovi Joestar Wettersten (CERN)

Presentation materials