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Alex Kluge (CERN)30/09/2024, 14:00
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Dr Dima Maneuski (University of Glasgow (GB)), Dr Richard Bates (University of Glasgow (GB))30/09/2024, 14:20
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Kenway Smith (University of Glasgow)30/09/2024, 14:40
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Prof. Keith Metheson30/09/2024, 15:50
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Prof. Dino Jaroszynski30/09/2024, 16:30
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Giles Hammond30/09/2024, 17:10
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James Hoff (Fermi National Accelerator Lab. (US))01/10/2024, 09:00
With over 6 million channels, the High Granularity Calorimeter (HGCAL) for the CMS HL-LHC Upgrade presents a unique data challenge. The ECON ASICs provide critical on-detector data reduction for the 40 MHz trigger path (ECON-T) and 750 kHz data acquisition path (ECON-D) of the HGCAL. The ASICs, fabricated in 65nm CMOS, are rad-tolerant (600 Mrad) with low power consumption (<2.5 mW/channel)....
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Alessandra Camplani (University of Copenhagen (DK)), Filiberto Bonini (CERN)01/10/2024, 09:00
The ATLAS experiment requires a high-precision bunch clock distribution for the High-Luminosity upgrade of the Large Hadron Collider. A new trigger and timing distribution system based on FPGA transceivers and high-speed serial links will replace the existing one. In preparation for this upgrade, we characterized the clock phase uncertainty of AMD UltraScale+ transceivers after reset. We found...
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Edoardo Orzes01/10/2024, 09:20
Picosecond-level phase determinism in timing distribution systems is a requirement for future detectors in High Energy Physics. FPGA transceivers traditionally used to propagate timing do not meet by default this stringent requirement, and suffer from phase jumps at startup and temperature drifts. While ad-hoc solutions have been developed based on particular FPGA features to measure phase...
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Matteo Lupi (CERN)01/10/2024, 09:20
The High-Granularity Calorimeter (HGCAL) of CMS will undergo a major upgrade during the Long-Shutdown 3. The Endcap Concentrators (ECON) ASICs represent key elements in the readout chain, processing trigger (ECON-T) and data (ECON-D) streams from the HGCROC to the LpGBT. The ECONs will operate in a radiation environment with a High-Energy Hadron (HEH) flux of $3\cdot10^{6}...
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Soumyajit Mandal01/10/2024, 09:40
Many high-energy physics experiments require high-data-rate links between readout ASICs and digital back-end processors over lossy channels, such as radio-pure cables. The preferred solution uses a forwarded clock architecture in which the back-end transfers a low-frequency reference clock (e.g., from a crystal oscillator) to the readout system over a low-speed cable, which is then used by a...
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Philippa Hazell (CERN)01/10/2024, 09:40
The LHC RF and Timing Distribution backbone is being upgraded for the HL-LHC. A White Rabbit technology solution for the generation and the distribution of the RF, similar to the system currently employed in SPS, is being considered. To verify its suitability from a phase stability perspective, an investigation was conducted on a proof-of-concept system. The requirement for the end-nodes is ±...
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Prof. Douglas Paul (University of Glasgow)01/10/2024, 10:30
The UK was the first to have a National Quantum Technology Programme with the aim of building practical systems that use quantum superposition, entanglement or squeezing to produce new sensors and clocks with improved accuracy over present commercial systems. Many other countries have followed with their own quantum technology programmes either to build quantum computers or to develop quantum...
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Marco Andorno (CERN)01/10/2024, 11:20
As front-end ASIC complexity in HEP experiments grows, there is a shift towards more modular, programmable, and cost-effective designs. This work introduces the SOCRATES platform, a radiation-tolerant SoC generator toolset, centered on SoCMake, a hardware/software build system that automates SoC assembly and verification. Utilizing existing IP blocks, SoCMake generates the interconnects and...
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Sioni Paris Summers (CERN)01/10/2024, 11:20
For the High-Luminosity Large Hadron Collider era, the trigger and data acquisition system of the Compact Muon Solenoid experiment will be entirely replaced. Novel design choices have been explored, including ATCA platforms with SoC controllers and interconnect technologies with serial optical links with data rates up to 28 Gb/s. Trigger data analysis will be performed through sophisticated...
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Dominik Gorni01/10/2024, 11:40
In response to the need for higher timing resolution innovative readout schemes are being explored for silicon vertex detectors like being under development ALICE ITS3 and EIC ePIC SVT. A promising direction is the event-driven approach, exemplified by the EDWARD (Event-Driven With Access and Reset Decoder) architecture. This presentation will highlight the capabilities of the EDWARD65P1 test...
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Piotr Andrzej Fokow (Warsaw University of Technology (PL))01/10/2024, 11:40
The Overlap Muon Track Finder (OMTF) is one of the subsystems of the CMS L1 Trigger. For the High-Luminosity Large Hadron Collider era (CMS phase-2 upgrade), a new version of the OMTF is currently under development. This upgraded version will be implemented on a custom ATCA board X2O, which houses a Xilinx UltraScale+ FPGA and 25 Gbps optical transceivers. This contribution focuses on the...
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Julian Maxime Mendez (CERN), Julian Mendez (SLAC), Julian Mendez (SLAC)01/10/2024, 12:00
High pileup densities imply new challenges. In this context, 4D tracking with a timing resolution of ~10ps is essential for track reconstruction. For Muon Colliders, precise timing information becomes indispensable to mitigate the Background Integrated Beam (BIB). Therefore, a high-precision Time-To-Digital (TDC) stands as a crucial component in realizing 4D tracking. In 2023, we introduced...
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Marco Ferrero (Universita e INFN Torino (IT))01/10/2024, 14:00
The FAST3 (Fast Amplifier for Silicon detector for Timing) is a low noise 16-channel ASIC, belonging to the FAST ASIC family. FAST3 has been implemented in UMC 110 nm CMOS technology, and the design has been optimized for the read-out of 50µm-thick LGAD (Low-Gain Avalanche Diode). The figure of merit of FAST3 is the excellent temporal jitter below 20ps in a wide dynamic range of input charge...
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Alvaro Navarro Tobar (CIEMAT - Centro de Investigaciones Energéticas Medioambientales y Tec. (ES))01/10/2024, 14:00
The HL-LHC has motivated a generalized upgrade in electronic systems across all experiments. In the new electronics architecture for the CMS Drift Tubes detector, the trigger generation moves from on-detector ASICs to the back-end, to be carried out by top-range FPGAs. The new algorithm aims to deliver full-resolution, offline-grade performance in the reconstruction of muon segments. To...
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Tiehui Ted Liu (Fermi National Accelerator Lab. (US)), Tiehui Ted Liu (Fermi National Accelerator Lab. (US))01/10/2024, 14:20
The Endcap Timing ReadOut Chip (ETROC) is designed to process LGAD signals with time resolution down to ~ 40-50ps per hit. The ETROC2 is the first full size prototype design fully compatible with the final chip specifications for CMS ETL. The ETROC2 chips have been extensively tested over the past year since May 2023, with laser, hadron beam at CERN and electron beam at DESY, with temperature...
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Javier Prado Pico (Universidad de Oviedo (ES))01/10/2024, 14:20
Phase-2 CMS will replace the trigger and data acquisition system in preparation for the HL-LHC. This upgrade will allow a maximum accept rate of 750kHz and a latency of 12.5us. To achieve this, new electronics and firmware are being designed. We describe the first version of an algorithm capable of detecting and identifying muon showers, running in the first layer of the trigger system.
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It... -
Patrick Kelling (Rice University (US))01/10/2024, 14:40
We report on the development, implementation, and performance of a fast neural network used to measure the transverse momentum in the CMS Level-1 Endcap Muon Track Finder. The network aims to improve the triggering efficiency of muons produced in the decays of long-lived particles. We implemented it in firmware for a Xilinx Virtex-7 FPGA and deployed it during the LHC Run 3 data-taking in...
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Gian Matteo Cossu (INFN, Cagliari (IT))01/10/2024, 14:40
The IGNITE project develops technical solutions for the next generation of trackers at colliders. It plans to implement an integrated module, comprising sensor, electronics, and fast readout, aimed at fast 4D-tracking. System pixels are required to have pitch around 50 µm and time resolution below 30 ps. In the present paper we present measurement results concerning the performance of the...
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Edda Gschwendtner (CERN)01/10/2024, 15:30
Abstract
In particle physics accelerators remain the key tools for understanding the building blocks of matter and the origin of the universe.
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Exploring collisions at even higher energy will enable the investigation of yet smaller and more intricate features. Many feasibility studies for new accelerators reaching the energy frontier are currently under way. These accelerators include both... -
Bojan Markovic (SLAC National Accelerator Laboratory (US))01/10/2024, 16:20
Highly granular precision timing detectors are required to achieve scientific breakthroughs across HEP, NP, BES, and FES. To enable the development of these detectors, 3D-intgration between advanced sensor wafers and scaled CMOS technology nodes is required but is currently cost-prohibitive for use in scientific applications. Closing this technology gap is the joint SLAC, FNAL and LLNL effort...
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Isobel Ojalvo (Princeton University (US))01/10/2024, 16:20
The design, testing, system integration and performance of the ATCA processor (APx) boards firmware and software for the Phase 2 CMS trigger upgrade are presented. The 76 boards plus spares comprise the Calorimeter Trigger and half of the Global Track and Correlator Triggers. The production boards are based on the Xilinx VU13P and have 124 25G optical interfaces. A new optical link protocol...
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Wenjie Dai01/10/2024, 16:40
We present the design and preliminary test results of a MAPS sensor prototype MIC6_V1 based on a 55nm Quad-well CMOS Image Sensor process for the vertex detector application. In order to achieve high-spatial resolution, fast readout, and low power consumption, MIC6_V1 has implemented a new node-based, data-driven parallel readout architecture. The integration time is 5us, and by sharing VCO in...
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Kai Lukas Unger01/10/2024, 16:40
The Belle II experiment searches for physics beyond the standard model. Among the intriguing candidates are decays with an offset vertex. However, the current level-1 trigger dismisses these candidates. To address this problem, a new trigger system is required that can identify such decays when they exhibit two tracks from an offset vertex. The approach uses parallel calculations of Hough...
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Xiaoting Li (IHEP)01/10/2024, 16:40
Accurate time measurement is essential for future high-energy physics experiments, such as Calorimeters and Time of Flight detectors of the Circular Electron Positron Collider (CEPC). The advancement of detector performance necessitates the need of high-resolution timing circuits. We introduce a ring-oscillator based timing block controlled by a delay locked loop, employing passive...
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Magali Magne (Université Clermont Auvergne (FR))01/10/2024, 16:40
The GRAiNITA prototype has been developed as a first step toward the development of a next-generation calorimeter for FCC-ee. To evaluate GRAiNITA performance, a special test bench was built. The principle consists in tracking the cosmic ray muons that pass through the prototype to check the response of it as a function of the region traversed. Wavelength-shifting fibers capture the light...
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Luigi GAIONI (University of Bergamo and INFN (IT))01/10/2024, 16:40
This work describes the design, in a 28 nm CMOS technology, of a front-end channel for the readout of pixel sensors in future particle accelerators. The channel being developed leverages the Time-Over-Threshold technique for the numerical conversion of the detector signal amplitude, and includes a low-noise charge sensitive amplifier featuring a compact gain stage architecture. A prototype...
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Oliver Bowett, Stephen Bell (Science and Technology Facilities Council), Thomas Charles Gardiner (Science and Technology Facilities Council STFC (GB))01/10/2024, 16:40
Quality analogue radiation-hardened design in 28nm CMOS is an iterative process best achieved through IP development. Rutherford Appleton Laboratory (RAL) ASIC Design Group has implemented two test-structure ASICs, PURNIX and YELNIX, to validate the performance of circuits up to 1GRAD TID. PURNIX includes essential building-block radiation-hardened IP, while YELNIX includes a prototype LGAD...
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Martim Rosado (Universidade de Lisboa (PT))01/10/2024, 16:40
The CMS Collaboration will replace its current endcap calorimeters with a new high granularity calorimeter (HGCAL) for operations at the HL-LHC. The HGCAL back-end DAQ system comprises 96 FPGA-based ATCA boards, each processing data from 108 input optical fibres operating at 10 Gb/s. This paper describes in detail the architecture and prototyping of the elementary readout unit in the back-end...
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Mr Mathias Gloor (Paul Scherrer Institut)01/10/2024, 16:40
At PSI the future standard hardware platform based on CompactPCI-Serial is already widely spread for developments in several applications and is under discussion for use on all our accelerators.
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With the focus on cost optimization smaller sub-racks are now part of the toolbox as well as rear boards with a subtle set of interfaces.
Based on the requirements of a Fill-Pattern Monitor for SLS... -
Yuvaraj Elangovan (University of Pittsburgh (US))01/10/2024, 16:40
CosmoLink is a compact coincidence detector comprising two scintillators for portable on-site muon flux measurement. The Scintillators are coupled with wavelength shifting (WLS) fibers for efficient light guiding to Silicon photomultipliers (SiPMs). Each readout channels equipped with a Transimpedance preamp, Discriminator and peak hold circuit. Upon successful coincidence trigger the peak...
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Filip Bilandzija (University of Zurich (CH))01/10/2024, 16:40
Before starting the High-Luminosity Large Hadron Collider (HL-LHC) runs, the CMS detector will be substantially upgraded to cope with the significant increase in instantaneous luminosity. The entire CMS Inner Tracker (IT) detector will be replaced, and the new detector will feature increased radiation hardness, higher granularity, and the capability to handle higher data rates and longer...
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Jie Zhang (Institute of High Energy Physics(IHEP), Chinese Academy of Sciences(CAS))01/10/2024, 16:40
The Taishan Antineutrino Observatory (TAO) aims to measure the energy spectrum of reactor antineutrinos, providing a reference spectrum for the JUNO and offering benchmark references for the nuclear databases.
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The JUNO-TAO experiment uses 4024 SiPM tiles with 8048 ADC channels to ensure the proposed energy resolution(<1.5% @ 1 MeV), spatial resolution(around 1 cm), and timing... -
Ayumi Morita (Iwate University)01/10/2024, 16:40
We developed signal readout electronics for a liquid argon time projection chamber detector, envisioned for use in neutrino oscillation and nucleon decay search experiments. The front-end electronics are based on the ASIC technology, which consists of a 16 channels analog processor, an analog-to-digital converter, and a signal transmitter for digital processing. We demonstrated that the...
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Markus Helbig (Technische Universitaet Dresden (DE))01/10/2024, 16:40
The High-Luminosity LHC will start operations for physics in 2029.
The expansion of the dataset will be achieved by increasing the number of collisions per bunch crossing, leading to higher radiation doses and busier events. To cope with those harsher conditions, the ATLAS Liquid Argon Calorimeter readout will be upgraded to be able to efficiently measure the deposited energies.
A new...
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Marek Idzik (AGH University of Krakow (PL)), Miroslaw Firlej (AGH University of Krakow (PL))01/10/2024, 16:40
The design and measurement results of a prototype TDC fabricated in CMOS 130nm technology are presented. The TDC architecture with analog interpolators was chosen, which was motivated by previous experience in ADC design. The measured time difference between the event and the trigger signal is converted to the amplitude and then digitised by a 10-bit ADC. The TDC prototype is functional nad...
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Mr Adrien Verplancke (OMEGA-CNRS)01/10/2024, 16:40
The ASIC EICROC is designed to read out the AC-LGAD detectors for the future EIC at Brookhaven National Laboratory (BNL). These detectors should combine excellent temporal (20 ps) and spatial (20 um) resolution, enabling a new generation of pixel detectors with precise time measurement. Designing an ASIC to read out the AC-LGAD detector represents a significant technological challenge. EICROC...
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Dominic Ecker (Bergische Universitaet Wuppertal (DE))01/10/2024, 16:40
The Embedded Monitoring Processor (EMP) is a state-of-the-art multi-processing System on Chip (MPSoC) based platform, designed for the Detector Control System (DCS) of the ATLAS experiment upgrade. Utilizing the advanced capabilities of the Xilinx Ultrascale+ architecture, the EMP interfaces with the monitoring and control functionalities of its radiation hard front-ends through high-speed...
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Nikola Rasevic01/10/2024, 16:40
In preparation for the operation at HL-LHC the electronics of the Electromagnetic calorimeter Barrel must be replaced. 12240 new very front end (VFE) cards will amplify and digitize signals of 62100 lead-tungstate crystals instrumented with avalanche photodiodes. 2448 low voltage regulator cards provide power for the VFE and digital interface cards. Reliable operation of these cards with...
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Jian Liu (University of Liverpool (GB))01/10/2024, 16:40
During the upcoming Long Shutdown (LS3) of the LHC, the three innermost layers of the ALICE Inner Tracking System (ITS2) will be replaced by ITS3, a new vertex detector utilizing curved, stitched wafer-scale monolithic silicon sensors, fabricated using 65 nm CMOS technology and thinned to 50 μm. The feasibility of this technology for ITS3 was examined in the initial test production run (MLR1)....
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Dr Wojciech Zabolotny (Warsaw University of Technology, Faculty of Electronics and Information Technology, Institute of Electronic Systems), Dr Wojciech Zabolotny (Warsaw University of Technology (PL))01/10/2024, 16:40
The STS detector in the CBM experiment delivers data via multiple E-Links connected to GBTX ASICs. In the process of data aggregation, that data must be received, combined into a smaller number of streams, and packed into so-called microslices containing data from specific periods. The aggregation must consider data randomization due to amplitude-dependent processing time in the FEE ASICs and...
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Lukas Bauckhage (Deutsches Elektronen-Synchrotron (DE))01/10/2024, 16:40
The ATLAS Strip Tracker for HL-LHC consists of individual modules of silicon sensors and front-end electronics. The modules are mounted on carbon-fiber substructures with 14 modules per side. An End-of-Substructure (EoS) card connects up to 28 data lines to lpGBT and VL+ ASICs that provide data serialization and 10 GBit/s optical data transmission to off-detector systems, respectively. The EoS...
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Valentin Stumpert (CERN, KIT - Karlsruhe Institute of Technology (DE))01/10/2024, 16:40
New-generation physics detectors create a need for high-speed, high-flexibility datalinks in the community. Specific interest lies with commercial standards, compatible with off-the-shelf hardware, therefore replacing custom backends.
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We present encouraging first results of an effort evaluating 100Gb/s Ethernet for data readout in the context of typical High-Energy Physics detector... -
Ayushi Khatri (University of Liverpool (GB))01/10/2024, 16:40
MightyPix is the first iteration of a High-Voltage CMOS (HV-CMOS) sensor chip developed for the LHCb Mighty Tracker. The digital readout of this chip is compatible to LHCb specifications. To verify the digital functionality of the chip in an LHCb environment, an emulator has been developed . This setup comprises the FPGA, CERN's developed VLDB, some custom interface boards and support...
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William Ian Helsby (STFC Daresbury Laboratory (GB))01/10/2024, 16:40
Next generation particle physics experiments like Electron Ion Collider (EIC) demand high-speed data communication and lower mass designs for its detectors.
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This poster presents initial test results for circuits designed to meet the EIC high-speed data requirements. These include a dual-frequency Phase Locked Loop (PLL) that supports two frequency modes of operation, a 5 GHz Pseudo-Random... -
Dr Isar Mostafanezhad (Nalu Scientific, LLC)01/10/2024, 16:40
Abstract: We present the architectural design, prototype fabrication and first measurements for the second revision of the High Pitch digitizer System-on-Chip (HPSoC) prototype. The HPSoC concept is that of a high channel density and scalable waveform digitization ASIC with an embedded interface to advanced high-speed sensor arrays such as e.g. AC-LGADs. The chip was fabricated in 65nm...
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Yan Zhou (Tsinghua University (CN))01/10/2024, 16:40
ITk strip module is the basic unit in ITk strip upgrade. To do an irradiation test for module with smaller size, the collaboration developed a board called BETSEE. We finish BETSEE test with all latest version of ASICs using proton beam at China Spallation Neutron Source, which is the first time using 10(Mrad/h) level dose rate. From our result, SEE effect is acceptable but TID effect become...
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Yahya KHWAIRA01/10/2024, 16:40
The ATLAS collaboration will replace its inner detector by an all-silicon tracker for the HL-LHC.
The new pixel detector will cover a sensitive area of 13m2 with about 9000 modules, made of planar and 3D silicon sensors bump bonded to new Front-End ASIC.
The modules are loaded on carbon structures in the form of (half)rings and staves.Electrically functional prototypes of these local...
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Pablo Daniel Antoszczuk (CERN)01/10/2024, 16:40
A new on-detector power distribution scheme for the High Granularity Calorimeter (HGCAL) Phase-2 upgrade of CMS is under development. This scheme is based on a heavy-copper flexible printed circuit board (FPC), allowing for an efficient use of the tight integration space, with minimal insulation overhead, excellent electrical and thermal performance and simplified integration, when compared...
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Francesco Martina (CERN)01/10/2024, 16:40
The performance of ASICs for high-bandwidth communications is heavily influenced by the interconnection with the hosting module and paired devices, including the bonding scheme and the PCB layout. The validation campaign of the DART28 high-speed transmitter has highlighted that a coordinated simulation and design of the power delivery network is required to obtain satisfactory performance. In...
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Jan Hammerich (University of Liverpool (GB))01/10/2024, 16:40
Silicon particle detectors struggle to follow the miniaturisation of available commercial processes, partially due to the relatively large transistors required for the optimal performance of the analogue frontend. Particam instead uses a digital only approach which is focused on digital storage cells switching due to transient radiation. With a pixel being little more than a memory cell it can...
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Dr Ferdinando Giordano01/10/2024, 16:40
High-precision time measurements are the latest trend for experiments and PET applications.
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Compactness, scalability and applicability to thousands of channels is required for the readout electronics.
CAEN A5203 board, part of a synchronizable and distributable Front-End Readout System (FERS), integrates the CERN picoTDC ASIC on a small unit for high-resolution time measurements of ToA and... -
Dr Ahmet Lale01/10/2024, 16:40
Developing a cost-effective single-die pixel-detector hybridization method using Anisotropic Conductive Films (ACF) or Anisotropic Conductive Paste (ACP) aims to replace fine-pitch bump bonding with conductive micro-particle embedding in adhesive film or paste. This technology enables integration of hybrid or monolithic detectors in modules, replacing wire bonding or solder-bumping. Within the...
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Kai Chen (Central China Normal University), dou zhu (ccnu)01/10/2024, 16:40
NνDEx-100 is the phase I of NνDEx, which is a proposed 0νββ detection experiment based on the high pressure gaseous TPC filled with SeF6. Thousands of sensors will be placed on the readout plane located in one end-cap of the TPC. The sensors collect ions, measure the charge and output analog waveforms with the integrated CSA. The outputs are then digitized, aggregated, and transmitted to the...
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Benjamin Parpillon (Fermi National Accelerator Lab. (US))01/10/2024, 16:40
Next-generation silicon pixel detectors with fine granularity will allow for precise measurements of particle tracks in both space and time. A reduction in the size of pixel data must be applied at the collision rate of 40MHz to fully exploit the pixel detector information of every interaction for physics analysis.
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We developed radiation hard readout integrated circuit with on-chip digital... -
Daisuke Hashimoto (Nagoya University (JP))01/10/2024, 16:40
Results are presented for reliability tests of the SFP+ transceivers and the readout board of Thin Gap Chambers (TGC) for the ATLAS experiment at HL-LHC. The radiation tolerance was evaluated for the SFP+ transceivers from Broadcom and FS and the TGC frontend board with gamma ray irradiation up to O(100) Gy at the Cobalt-60 facility of Nagoya University. An accelerated aging test was also...
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Riccardo Ricci (Universita e INFN, Salerno (IT))01/10/2024, 16:40
The ALICE experiment at the Large Hadron Collider (LHC) has planned an upgrade of the Inner Tracking System, ITS3, which will be installed during the LHC Long Shutdown 3 (LS3, 2026-2028). This presentation will show fresh results about the resolution performance obtained at the end of 2024 with 65 nm CMOS MAPS Analogue Pixel Test Structures during beam tests at CERN SPS. Resolution performance...
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Adriana Milic (CERN)01/10/2024, 16:40
To cope with the increase of the LHC instantaneous luminosity, new trigger readout electronics were installed on the ATLAS Liquid Argon Calorimeters.
On the detector, new electronic boards digitise 10 times more signals than the legacy system. Downstream, large FPGAs are processing up to 20 Tbps of data to compute the deposited energies. Moreover, a new control and monitoring infrastructure...
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Hannes Sakulin (CERN)01/10/2024, 16:40
The Global Trigger will be the final stage of the new Level-1 trigger for Phase-2 operation of CMS. Based on high-precision inputs from the muon-, calorimeter-, track- and particle flow triggers, it will evaluate a menu of O(1000) cut-based and machine-learning-based algorithms in a system of up to thirteen Serenity processing boards equipped with AMD Ultrascale+ FPGAs and interconnected with...
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Fuat Ustuner (The University of Edinburgh (GB)), Riccardo Zanzottera (Università degli Studi e INFN Milano (IT))01/10/2024, 16:40
High-voltage CMOS Pixel technology is being considered for future Higgs factory experiments. The ATLASPix3.1 chip, with a pitch of 50μm x 150μm, fabricated using TSI 180nm HV-CMOS technology, is a full reticle-size monolithic HV-CMOS sensor with shunt-low dropout regulators that allow serial powering for multiple sensors. A beam test was conducted at DESY using 3-6 GeV positron beams, with...
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Angira Rastogi (Lawrence Berkeley National Lab. (US))01/10/2024, 16:40
The ATLAS experiment is preparing for the High-Luminosity LHC era, by replacing the current innermost detector with an advanced all-silicon tracker (pixels and strips) to withstand radiation damage and increased particle activity. Pixel module quality control spans various production stages which necessitates a robust data acquisition software capable of handling high data rates and MHz...
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Hulin Wang (Central China Normal University)01/10/2024, 16:40
In this talk, we report the R\&D program underway at CCNU to develop a pixel chip for the readout of GEM detectors appropriate for use in the CSR external-target experiment (CEE) at HIRFL for beam monitoring. The chip offers simultaneous time-over-threshold (TOT) and time-of-arrival (TOA) measurements, and a data-driven readout scheme with a rate of 40 MPixels/s. Two generations of the chips...
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Pedro Vicente Leitao (CERN)02/10/2024, 09:00
Following the ALICE ITS3 detector development line of wafer-scale monolithic stitched pixel detector prototypes in the TPSCo. 65nm CMOS imaging technology, the MOSAIX chip is the prototype of the final full-size and full-functionality ITS3 sensor.
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MOSAIX has a die size of 26.6x1.96 cm2 with >94% of active area. It has 144 sensor tiles which can be powered individually to compensate for... -
Georgios Bantemits (CERN)02/10/2024, 09:00
A family of fully integrated (including all capacitors and inductors) rad-hard DCDC converters has been developed for the first time in the HEP community. This work presents the experimental results of three functional ASICs prototypes designed in a 28nm CMOS technology using 0.9V-rated transistors. All prototypes have been designed to withstand 1Grad. iPOL5V and iPOL2V3 are state-of-the-art...
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Szymon Bugiel (CERN)02/10/2024, 09:20
For the LS3 ALICE ITS3 upgrade the detector material budget reduction has been pushed to the limit by proposing a system composed almost exclusively of silicon wafer thinned to 50$\,\mu\mathrm{m}$. This improves performance, but adds complexity to the ASIC design. It requires a wafer-scale module with embedded power delivery network and on-chip data transfer, which were usually done through...
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Werner Lustermann (ETH Zurich (CH))02/10/2024, 09:20
Efforts aiming at consolidating the powering for the CMS detector have led to the development of a Low Voltage Power Supply (LVPS). The LVPS converts 380 VDC to 12 VDC, suitable for powering the widely used bPOL12V Point-Of-Load DC-DC converter. To limit cables size, the LVPS must be hosted in the CMS experimental cavern, being exposed to ionizing radiation and stray magnetic field of up to...
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Dr Nils van der Blij02/10/2024, 09:40
DC/DC converters that are tolerant to high magnetic fields and radiation are needed to improve the power distribution scheme of High Energy Physics (HEP) experiments. This paper presents 2 topics: firstly, an optimised rad-hard production-ready module for 48V to 5V-12V conversion (including) a custom PCB air core inductor, and secondly the outcome of a R&D program for developing next...
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Gregor Hieronymus Eberwein (University of Oxford (GB))02/10/2024, 09:40
The Monolithic Stitched Sensor (MOSS) is a prototype silicon pixel sensor of $26~\textrm{x}~1.4~\textrm{cm}^2$ size with the primary goal of understanding the stitching technique and yield. It is a proof-of-concept chip for the final sensors of the ALICE ITS3 upgrade. Given the large size, high yield is paramount for the ITS3 sensors and an in-depth yield characterization was performed on MOSS...
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Geoff Hall02/10/2024, 10:30
Abstract
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Since CERN was founded, there have been significant changes in detector technologies which in turn have necessitated big changes in the readout and data acquisition electronics. Many of them have taken place since about 1990 during the preparations for LHC, profiting especially from the commercial impetus driving the rapid growth of consumer electronics. As a non-historian, and not... -
Nico Härringer (ETH Zurich (CH))02/10/2024, 11:20
In preparation of the operation of the CMS electromagnetic calorimeter (ECAL) barrel at the High Luminosity Large Hadron Collider (HL-LHC) the entire on-detector electronics will be replaced. The new readout electronic comprises 12240 very front end (VFE), 2448 front end (FE) and low voltage regulator (LVR) cards arranged into readout towers (RTs) of five VFE, one FE and one LVR cards. The...
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Simone Emiliani (CERN)02/10/2024, 11:20
The MOSS wafer-scale monolithic sensor, designed for the vertex detector (ITS3) of the ALICE experiment, features a pixel input capacitance of ~5fF. Such a small input capacitance is needed to reach a satisfactory SNR with a low-power analog front-end (30nW/pixel). This makes the design of the pulsing circuitry needed to characterize the front-end performance particularly challenging. As an...
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Carlo Alberto Fenoglio02/10/2024, 11:40
The ASIC for the high-granularity pre-shower detector of the FASER experiment at CERN is a full-reticle imaging chip (1.5x2.2 cm^2) for TeV-scale electromagnetic showers at the LHC. It features a monolithic pixel sensor with 65 µm side hexagonal pixels in IHP 130nm SiGe BiCMOS. The pixels integrate analog memories for charge measurement (0.5 fC÷64 fC) and the frontend with 100-ps-level jitter...
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Gabriela Cabrera Castellano (CERN)02/10/2024, 11:40
The Beam Gas Ionization (BGI) profile monitor, situated within the PS and SPS accelerators, requires a radiation-tolerant readout system to transfer data from the challenging accelerator surroundings to the back-end for processing. Operating 1m below the beam pipe, the front-end must ensure reliability, given limited hardware access, and preserve signal integrity for the high-speed Timepix3...
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Salvatore Fiore (CERN)02/10/2024, 12:00
The Radiation Monitoring System (RadMon) for CERN accelerator complex measures radiation levels in the accelerator tunnels, adjacent shielded galleries and experimental areas. This allows the correlation of observed radiation-induced equipment failures with the respective accumulated radiation levels. The main component of the system is the RadMon device, a compact detection and communication...
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Eva Vilella Figueras (University of Liverpool (GB))02/10/2024, 12:00
The RD50-MPW prototypes are High Voltage CMOS pixel chips in the 150 nm technology from LFoundry S.r.l. aimed at developing monolithic silicon sensors with excellent radiation tolerance, fast timing resolution and high granularity for tracking applications in future challenging experiments in physics. RD50-MPW4, the latest prototype within this programme, implements significant improvements...
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Alexander Madorsky (Boston University (US)), Jonathan Fulcher (Boston University (US)), Dr Rui Zou (Cornell University (US)), Zeynep Demiragli (Boston University (US))02/10/2024, 14:00
The APOLLO ATCA platform is an open-source design that separates into a generic "Service Module" (SM) and customizable "Command Module" (CM), allowing cost-effective use in applications such as readout of the inner tracker and Level-1 track trigger for the CMS Phase-II upgrade at the HL-LHC. The SM incorporates an intelligent IPMC, robust power entry and conditioning systems, a powerful...
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Yoshifumi Narukawa (University of Tokyo (JP))02/10/2024, 14:00Programmable Logic, Design and Verification Tools and MethodsOral
Firmware testing on actual hardware is an optimal way to validate large-scale FPGA-based trigger/DAQ systems. For the ATLAS Phase-II level-0 muon trigger system's Sector Logic (SL) firmware, a methodology using prototype ATCA-based SL boards was developed, featuring self-complete DAQ, high-statistics test patterns, and various nature of input test data. The design exploits Zynq SoC on the...
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Alberto Perro (Universite d'Aix-Marseille III (FR))02/10/2024, 14:20Programmable Logic, Design and Verification Tools and MethodsOral
HEP data acquisition systems are often built from high-end FPGAs. As such systems scale in the HL-LHC era, severe underutilization of FPGA transceivers can occur because frontend links prioritize radiation hardness and power consumption over raw data bandwidth. This work evaluates recently introduced low-power, low-cost FPGA devices as an alternative building block for future readout...
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Jeroen Hegeman (CERN)02/10/2024, 14:20
The LHC-synchronous part of the Phase-2 CMS DAQ and timing systems
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will be built around two custom ATCA boards, interfacing the
subdetector back-ends to the central trigger-DAQ systems. The DAQ and
Timing Hub provides a 10 Gb/s connection to the central timing system,
and up to 400 Gb/s of DAQ bandwidth. This board can be combined with
one/multiple DAQ800 boards to increase the data... -
Mr Toon Vinck (KU Leuven)02/10/2024, 14:40Programmable Logic, Design and Verification Tools and MethodsOral
Deep Neural Networks are increasingly deployed at safety-critical operations. In order to enable this technology for harsh environments that contain high levels of radiation, fault analysis and mitigation is required. In this study, we present a model-based fault injection campaign to analyze the impact of multiple Single-Event Upsets (SEUs) in Deep Neural Networks (DNNs). Furthermore, we...
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Julien Jiro Langouët (Aix Marseille Univ, CNRS/IN2P3, CPPM, Marseille, France)02/10/2024, 14:40
The data acquisition system of LHCb Upgrade I is a single stage readout followed by event building, real time reconstruction and selection. The current system already has to process 32 Tbps of data, and this will rise to above 200 Tbps with Upgrade II. The new PCIe Gen 5 readout board called PCIe400 embedding the most powerful altera’s Agilex M-series FPGA and 112 Gbps serial links is the...
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Jashandeep Dhaliwal (CERN)02/10/2024, 15:30Programmable Logic, Design and Verification Tools and MethodsOral
PixESL is a virtual prototyping framework tailored for forthcoming particle detectors. It aims to enable high-level abstraction for describing detectors developed in High Energy Physics experiments, simulating the entire chain from particle interaction to data packet readout. This contribution describes three different models developed in the PixESL framework for pixel detector applications: a...
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Qicai Li (University of Chinese Academy of Sciences, Beijing 100049, China & Institute of High Energy Physics, Chinese Academy of Sciences)02/10/2024, 15:30
A high-performance event-driven readout electronics system based on Timepix4 has been developed for energy-resolved neutron imaging detectors at China Spallation Neutron Source (CSNS). The system achieves a position resolution better than 55 µm and a timing resolution better than 1 µs. The readout electronics feature a large-capacity cache, high readout bandwidth, and FPGA-based hardware...
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Davide Falchieri (Universita e INFN, Bologna (IT))02/10/2024, 15:50
This work describes a custom electronics board (“PicoTDC board”) developed at INFN Bologna, whose goal is to provide fast timing measurements to generic detectors able to test different front-end electronics using a common FMC interface. The fast timing measurements are achieved using 2 PicoTDC ASICs from CERN, providing 128 channels with 3.05 ps LSB. Design choices and performance of the card...
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Matei Vasile (IFIN-HH (RO))02/10/2024, 15:50Programmable Logic, Design and Verification Tools and MethodsOral
RDMA communication can be a good solution for many communication use cases, such as in data acquisition systems and any other system requiring high bandwidth and low latency. Multiple options for an RDMA-based communication system have already been tested, such as profiling based on message size and message count, using multiple simultaneous clients for FPGA-based RDMA senders, or streaming...
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Carmelo Scarcella (CERN), Csaba Soos (CERN)02/10/2024, 16:20
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Kostas Kloukinas (CERN)02/10/2024, 16:20
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Alessandro Caratelli (CERN)02/10/2024, 16:30
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Jorge Rodriguez Fernandez (CERN)02/10/2024, 16:35
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Jan Troska (CERN)02/10/2024, 16:50
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Wouter Faelens (SOFICS)02/10/2024, 17:00
Abstract
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In this presentation, we will explore the critical role of on-chip ESD protection in advanced semiconductor processes. Starting with an introduction to ESD events and their potential to catastrophically damage semiconductor circuits, we will delve into the strategies employed to mitigate these risks. Traditional ESD protection methods, while sometimes effective, often introduce... -
Kevin Burt02/10/2024, 17:05
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Filiberto Bonini (CERN)02/10/2024, 17:30
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Paul Malisse (IMEC)02/10/2024, 17:30
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Alberto Perro (Universite d'Aix-Marseille III (FR))02/10/2024, 17:50
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Mark Willoughby02/10/2024, 17:55
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02/10/2024, 18:20
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Fabian Hummer (Karlsruhe Institute of Technology)03/10/2024, 09:00
For the upcoming high-luminosity LHC, the endcap calorimeters of the CMS experiment will be replaced by the high-granularity calorimeter (HGCAL), a sampling calorimeter using both silicon and scintillator as active materials in different regions depending on the radiation dose. This contribution describes the integration details of the scintillator-based front-end into the DAQ readout chain of...
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Selma Conforti Di Lorenzo (OMEGA (FR))03/10/2024, 09:00
The HKROC is designed to read out the Photo Multiplier Tubes (PMTs) for next-generation neutrino experiments, which involve multi-ton detector with thousands of PMTs. It measures and digitizes the charge (up to 2500 pC) and Time-of-Arrival (ToA) (25 ps), transmitting this data to the back-end electronics. A second prototype of the HKROC, submitted in CMOS 130 nm node by summer 2022, aimed to...
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Carlo Di Fraia (Universita Federico II e INFN Sezione di Napoli (IT))03/10/2024, 09:20
The contribution will concern the analysis of data provided by Gas Electron Multiplier (GEM) detectors already installed in the Compact Muon Solenoid (CMS) experiment. We will focus on the correlations among the baseline current observed in the High Voltage (HV) system, the background radiation, and the Large Hadron Collider (LHC) beam luminosity. Additionally, an update on the discharge rates...
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Alexandre Pierre Soulier (Université Clermont Auvergne (FR))03/10/2024, 09:20
ALTIROC3 is a 2x2 cm² CMOS 130nm ASIC with 225 channels to read-out the new ATLAS HGTD detector for the High Luminosity-LHC upgrade. It was designed using “Digital-On-Top” flow and triplicated for radiation hardness. Chip level IR-Drop analyses were performed to evaluate accurately the power distribution impact, especially for the Time- to- Digital- Converters implemented in each pixel. These...
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Giovanni Mazza (INFN sez. di Torino)03/10/2024, 09:40
The Cleopatra ASIC is a 12-channel prototype ASIC for the readout of hydrogenated amorphous silicon sensors used for real-time dosimetry in radiation diagnostic and radiation therapy.
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The architecture is based on a current to frequency conversion based on the recycling integrator principle in order to cover a dynamic range of four orders of magnitude with high linearity.
Three different... -
Gilles De Lentdecker (Universite Libre de Bruxelles (BE))03/10/2024, 09:40
We present the running experience of GE1/1, a new muon tracking and triggering station made of Triple-GEM detectors installed in the most forward region of the CMS muon spectrometer. GE1/1 records data since 2022. Each of the 144 detectors has 24 VFAT3, 3 GBTx, 3 VTRx, 2 VTTx and a Virtex-6 FPGA. All powered by 10 FEAST DCDC converters. We will present the GE1/1 electronics performance over...
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Perceval COUDRAIN (CEA/LETI)03/10/2024, 10:30
Driven by advancements in manufacturing technologies, microelectronics has evolved significantly beyond Moore's Law, now embracing "More than Moore".
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This shift emphasizes heterogeneous integration and innovative packaging schemes to overcome challenges like interconnect bottlenecks.
3D integration has emerged as a crucial approach, combining miniaturization benefits with new flexibility in... -
Lounes IDDIR (LPNHE)03/10/2024, 11:20
DAMIC-M is an experiment that searches for low-mass dark matter particles through their interactions with silicon nuclei or electrons in the bulk of charge-coupled devices (CCDs).
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The experiment has developed a new electronics which allows it to read skipper CCDs with a single-ionization charge resolution. An Acquisition and Control Module board (ACM) drives the multiple non-destructive... -
Chenfan Zhang (University of Liverpool (GB))03/10/2024, 11:20
A High-Voltage CMOS (HV-CMOS) pixel sensor for particle detection in high energy physics experiments, named UKRI-MPW1, has been developed. It has a high breakdown voltage of ~700 V, while keeping the leakage current below 100 $\mathrm{nA/cm^2}$. This is achieved by improving the sensor cross-section with a customised P-Shield layer and using an advanced chip guard ring scheme. With high...
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Giulio Bardelli (Universita e INFN, Firenze (IT))03/10/2024, 11:40
The harsh environment of the High-Luminosity Phase of LHC will force the CMS experiment to replace the present pixel detector with a new Inner Tracker implementing 65 nm CMOS read-out chips (CROC). The modules, i.e. the Inner Tracker subunits, are powered in series and read-out through a sophisticated opto-electrical chain. Full-scale systems are realized and tested for validation and...
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Mr Alberto López (ICCUB)03/10/2024, 11:40
This work presents the design of a 4-channel ASIC developed in a 65 nm CMOS technology specifically designed to measure the energy captured by the PMTs in the LHCb Upgrade II Calorimeter. The processing chain stands on rail-to-rail fully differential blocks that improve the common noise rejection and maximize the voltage range. A dual gain structure is adopted to extend the dynamic range up to...
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Soumyajit Mandal03/10/2024, 12:00
Multi-channel analog-to-digital converters (ADCs) operating over a wide temperature range are required for data acquisition in high-energy physics experiments, space missions, medical imaging, astronomy, and quantum computing. For example, charge readout of the liquid argon (LAr) time projection chambers (TPCs) used by the DUNE far detectors relies on cooled ADCs operating at 89K. Successive...
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Angelos Zografos (CERN)03/10/2024, 12:00
For the high-luminosity upgrade of the ATLAS Inner Tracking detector, a new pixel detector will be installed to increase bandwidth and to cope with higher radiation, among other challenges. In this contribution, the design aspects and qualification of the data transmission from pixel modules to optical readout are presented. A focus is put on the data cable bundles and their performance for...
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Hongbin Liu03/10/2024, 14:00
The China Spallation Neutron Source (CSNS) is undergoing an upgrade to CSNS-II, increasing its power to 500 kW. This talk summarizes the readout electronics for the 10 neutron instruments currently in operation or commissioning at CSNS, discussing challenges, solutions, and glitches encountered. We also present the development and testing of low-power readout electronics for 3He PSD arrays and...
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Dr Marc Schneider (KIT - Karlsruhe Institute of Technology (DE))03/10/2024, 14:00
We report characterization results for our new silicon photonic chip for high-speed data transmission, called COTTONTAIL (Chip for detector instrumentation with wavelength division multiplex). Modulation bandwidths of different conventional and radiation-hardened travelling-wave Mach-Zehnder modulators are sufficient for very high data transmission rates. Wavelength filters for wavelength...
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Valentina Scotti03/10/2024, 14:20
The SiSMUV project aims to develop a compact modular UV detector based on SiPMs for use in space telescopes, targeting the study of fluorescence and Cherenkov signals produced by Ultra-High Energy Cosmic Rays (UHECRs). SiSMUV has the objective of incorporating into a monolithic block, state-of-the-art sensors and low-power read-out electronics, creating a complete end-to-end system, which can...
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Carmelo Scarcella (CERN)03/10/2024, 14:20
The increasing luminosity in CERN experiments enabled by future upgrades demands optical links with enhanced bandwidth and radiation tolerance. Silicon Photonics (SiPh) emerges as the optoelectronic technology meeting these requirements and is being considered for the next generation of optical readout systems of CERN detectors. We present the progress on Silicon Photonics for High Energy...
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Dr Simone Cammarata (INFN Pisa & Istituto di Intelligenza Meccanica - Scuola Superiore Sant'Anna & Dipartimento di Ingegneria dell'Informazione - Università di Pisa)03/10/2024, 14:40
This study details the experimental characterization of silicon photonic ring modulators (RMs) and silicon-germanium (SiGe) electro-absorption modulators (EAMs) exposed to 12 MGy(SiO2) total ionizing dose (TID) within INFN’s project FALAPHEL. We extensively report on the evolution of their key performance metrics as a function of TID. These trends are analyzed in relation to the...
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Hongbin Liu03/10/2024, 14:40
The Circular Electron Positron Collider (CEPC) drift chamber requires high-performance readout electronics for accurate dN/dx measurement and particle identification (PID) using cluster counting techniques. The prototype readout electronics consists of high-speed op-amp based fast current amplifiers, 1.3 Gsps ADCs, and FPGAs for data acquisition and buffering. The system aims to acquire...
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Manuel Rolo (Universita e INFN Torino (IT))03/10/2024, 15:30
The growing interest on the use of CMOS circuitry for quantum computing and sensing is increasing the momentum of the R&D on cryogenic CMOS, unmistakably demonstrated by an almost tenfold increase on the number of related yearly publications since 2017, and creating new collaborative efforts between academia and industry partners on the optimisation of semiconductor technology and CMOS...
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Antonio Cristiano03/10/2024, 16:20
The consolidation of the Large Hadron Collider (LHC) Beam Instrumentation requires the digitisation of the analogue signals from the detectors within the radiation areas. Subsequently, the digital data are transmitted via the existing fibre plant to the back-end area for processing. In order to manage the increased volume of data with the existing infrastructure, the proposed Coarse Wavelength...
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Tetsuichi Kishishita (High Energy Accelerator Research Organization (JP))03/10/2024, 16:20
We developed a prototype of muon beam monitor for the COMET experiment. The detector consists of SiC PN-diodes and dedicated readout electronics. By tailing the 256 sensors in a matrix, the beam parameters extracted from this monitor are utilized for the essential background estimation. The electronics is designed in 65 nm CMOS, including 16 channels analog processor, ADC, PLL, and CML...
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Ping Yang03/10/2024, 16:40
Since full waveform sampling can provide more accurate signal information which is important for particle detectors. So high-speed, high precision and low power consumption Analog to Digital Converter is needed. A two-step sub-SAR ADC is used to achieve low power consumption and using pipeline principle to improve the speed. In-stage and between-stage redundancy technologies are used to...
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Jan Hammerich (University of Liverpool (GB))03/10/2024, 16:40
Ever more precise time information is required to separate independent events at planned and proposed particle physics experiments. Typically, a combination of internal gain, very fast amplifiers and complex sampling circuitry are used to achieve this high time resolution. In this contribution a novel circuit to improve the time resolution of a depleted monolithic active pixel sensor (DMAPS)...
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Xiongbo Yan (Institute of High Energy Physics, CAS)03/10/2024, 16:40
We present the R&D of FPMROC, an ASIC for ToF-PET with a fast MCP-PMT (FPMT). The design architecture includes a preamplifier, a discriminator with programmable threshold, a time- to-digital converter, an event builder with a serializer, a clock unit, and a SPI. We aim for a time resolution below 10 ps, matching the targeted FPMT parameters. We are designing the first prototype using a 55 nm...
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Ahmed Qamesh (Bergische Universitaet Wuppertal (DE))03/10/2024, 16:40
The upcoming ATLAS Phase II upgrade mandates replacing the tracking system with the all-silicon Inner Tracker (ITK), featuring a pixel detector as its core element. The monitoring data of the new system will be aggregated from an on-detector ASIC, Monitoring Of Pixel System (MOPS), and channeled to the Detector Control System (DCS) via a newly developed FPGA-based interface known as MOPS-Hub....
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Kai Chen03/10/2024, 16:40
We present the design and preliminary test results of a MAPS sensor, MIC6_Explorer0, based on a 55nm Quad-well CMOS Image Sensor process for high-energy physics experiment vertex detector applications. MIC6_Explorer0 comprises 3 large matrices and is intended to investigate the charge collection properties of the 55nm process with various MAPS design parameters, including pixel pitch, diode...
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Mr Abdelmowafak El Berni (OMEGA (FR))03/10/2024, 16:40
In High Energy Physics, ASICs are becoming more and more complex with the integration of many digital processing and monitoring structures. The next generation of System-On-Chips will require reprogrammable logic to let the user change the ASIC behavior after its fabrication. CPROC (Central Processing ReadOut Chip) is a processor demonstrator based on the RISC-V Instruction Set Architecture....
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Patrick Sieberer (Paul Scherrer Institut PSI)03/10/2024, 16:40
JUNGFRAU is a state-of-the-art charge-integrating detector for imaging experiments at synchrotrons and free-electron lasers. It is currently limited to a frame rate of 2.2 kHz. With the goal to increase the frame rate of the detector to > 10 kHz, we have designed a 3.125 Gbps high-speed serial readout recently. Thus, the development of a fast Analog-To-Digital Converter ADC has become our...
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Lazar Cokic (CERN)03/10/2024, 16:40
The CMS Electromagnetic Calorimeter (ECAL) uses lead tungstate scintillating crystals to measure the energy of electrons and photons produced at the Large Hadron Collider (LHC). The High Luminosity upgrade of the LHC (HL-LHC) at CERN during the LHC Long Shutdown 3 imposes significant challenges for its experiments. The higher luminosity changes the environmental conditions in which the ECAL...
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Roua BOUDAGGA03/10/2024, 16:40
A monolithic CMOS pixel sensor named OBELIX is beeing designed to equip new detection layers proposed as an upgrade of the current vertex detector of the Belle II detector. Based on the TJ-Monopix2 sensor, OBELIX integrates an extended matrix with 33 micrometers pixel pitch. The chip includes a unique combination of features for this granularity: low-dropout regulators, hit logic to match the...
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Mr Patryk Prus (AGH University of Krakow)03/10/2024, 16:40
The design and simulation results of an ultra-low power fast 10-bit SAR ADC in CMOS 130~nm technology, are presented. This ADC is an extension of experimentally verified (INL,DNL $<$ 0.5~LSB, ENOB$>$9.5) 10-bit SAR ADC working up to 50~MSps and consuming 680~uW@40~MSps. The goal of the new design was to add an internal threshold for the processed input signal, so as to stop the conversion and...
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Austin Mullins (Southern Methodist University (US)), Fuat Ustuner (The University of Edinburgh (GB))03/10/2024, 16:40
This contribution introduces a novel test system developed to evaluate the signal transmission quality in high-speed data links for the 2026 Inner Tracker upgrade of the ATLAS experiment. Using an FPGA-based data acquisition framework, the setup can run simultaneous Bit Error Rate (BER) tests for many channels and generate virtual eye diagrams, for qualifying the ~26K electrical links of ATLAS...
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Dr Alexander Klujev (Deutsches Elektronen-Synchrotron)03/10/2024, 16:40
The CoRDIA X-ray detector is a development targeting experiments at modern diffraction-limited synchrotron rings and free-electron lasers operating either in continuous wave or quasi-continuous long burst modes with photon bunch frequencies up to a few 100kHz. It’s a hybrid detector with sensitive tiles formed by a read-out ASIC bump bonded to a sensor. Since 2020 4 prototype ASICs were...
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Xiaoting Li (IHEP)03/10/2024, 16:40
he TaichuPix chip, a dedicated monolithic pixel sensor for the CEPC vertex detector R&D, demands a raw data rate up to 3.84Gbps and power consumption of less than 25mA/Gbps for the serializer circuit. The TaichuPix1 achieved a maximum data rate of 3.36Gbps with large jitter and current. Subsequently, two 4Gbps serializers were developed and optimized to meet the requirements. Despite...
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Devanshu Kiran Panchal (University of Texas at Austin (US))03/10/2024, 16:40
The High-Luminosity LHC will start operations for physics in 2029.
This expansion of the dataset will be achieved by increasing the number of collisions per bunch crossing, leading to higher radiation doses and busier events. To cope with those harsher conditions and to be compatible with the new ATLAS data acquisition paradigm, the ATLAS Liquid Argon Calorimeter on-detector electronics...
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Ryugo Mizuhiki (Kobe University (JP))03/10/2024, 16:40
Validation of the recent FPGA firmware logic used in particle physics is being hard, since the implemented logic becomes larger and more complex with increasing FPGA resources. In order to address efficiently, we have developed a firmware validation system using the FPGA accelerator produced by FPGA vendors. We have established a system by developing the interface with CPU of host computer,...
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Nikitas Loukas (University of Notre Dame (US))03/10/2024, 16:40
At LHC phase 2, the CMS detector electronics need a precise clock to discriminate piled-up events. The backend electronics of the barrel electromagnetic calorimeter (ECAL) supplies the high-precision clock to the frontend. However, after a reset in the deserializer, the resulting phase of the recovered clock is not accurately repetitive. Therefore we have studied a case where the system...
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Sylvain Mico (CERN)03/10/2024, 16:40
For nearly 20 years, the Power Supply and Crate Service at CERN has been responsible for the maintenance tracking of power supplies and crates used by the CERN experiments. With this experience, and with the imminent introduction of a new generation of power supplies for the HL-LHC, the timing is opportune to conduct a statistical analysis to draw lessons from the past and make recommendations...
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David Schledt03/10/2024, 16:40
The CBM experiment uses a free streaming DAQ with interaction rates up to 10MHz resulting in data rates, which exceed storage capabilities, necessitating online processing. The SPADIC ASIC of the CBM-TRD provides hit messages with oscilloscope-like sampling of the detector data, encoding valuable information. To speed up data unpacking and free up computing time, feature extraction is moved to...
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Melvin Leguijt (Nikhef National institute for subatomic physics (NL))03/10/2024, 16:40
The FELIX system, initially deployed for ATLAS in LHC Run 3, will evolve for Run 4, serving all subdetectors. The system will consist of 350 servers with new custom PCIe FELIX cards and 200 GbE interfaces, handling data at 1 MHz readout rate for a 4.6 TB/s throughput. The new PCIe cards, featuring an AMD Versal Premium FPGA/SoC and advanced connectivity, run upgraded firmware to decode data...
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Jakub Moron (AGH University of Krakow (PL))03/10/2024, 16:40
The design and measurement results of a SoC readout ASIC, called FLAXE, developed for the ECAL-p, the electromagnetic calorimeter at the LUXE experiment are presented. The FLAXE consists of 32 channels with programmable gain front-end, fully differential shaper, and a 10-bit SAR ADC in each channel, working nominally at 20 MSps. Due to a very low bunch crossing rate of 10Hz foreseen for the...
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Alessandro Lega (INFN)03/10/2024, 16:40
The use of ultra-lightweight flexible Printed Circuit Boards (PCBs) in silicon-based particle detectors was pioneered for the ALICE Inner Tracking System 1 (ITS1) and the STAR tracker in the early 2000s. These PCBs feature thin, flexible interconnections made of µm-scale polyimide (e.g. kapton) and metal (e.g. copper or aluminum), offering low-mass yet with stability of mechanical and...
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Hui Zhang03/10/2024, 16:40
The Monolithic Active Pixel Sensor (MAPS) implemented in high-voltage CMOS (HVCMOS) technology is one of the most sophisticated detectors for detecting high-energy particles. Over the past decade, the development of HVCMOS sensors has primarily focused on technology nodes ranging from 180 nm to 130 nm. To explore performance improvements in smaller technology nodes, a prototype of the...
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Carlo Di Fraia (Universita Federico II e INFN Sezione di Napoli (IT))03/10/2024, 16:40Poster
The contribution will concern the analysis of data provided by Gas Electron Multiplier (GEM) detectors already installed in the Compact Muon Solenoid (CMS) experiment. We will focus on the correlations among the baseline current observed in the High Voltage (HV) system, the background radiation, and the Large Hadron Collider (LHC) beam luminosity. Additionally, an update on the discharge rates...
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Vladimir Sidorenko03/10/2024, 16:40
With the streaming data acquisition scheme planned for the CBM experiment, the quality of event reconstruction depends on the accuracy of clock and time distribution. The Timing and Fast Control (TFC) system ensures that all the readout FPGA boards are aligned in time on the sub-clock and the absolute scales. This is achieved by distributing the time information over an optical link with...
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Alessandra Camplani (University of Copenhagen (DK)), Federico Morodei (Sapienza Universita e INFN, Roma I (IT))03/10/2024, 16:40
The High-Luminosity upgrade of the LHC (HL-LHC) will triple the proton-proton collision rate, posing challenging requirements for the ATLAS trigger and readout system. A low-latency, FPGA-based hardware trigger for muons in the barrel region will be implemented to identify candidates within 1.7 μs from collisions for further refinement by the Monitored-Drift-Tubes-Trigger-Processor. An...
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Johann Christoph Voigt (Technische Universitaet Dresden (DE))03/10/2024, 16:40
The Phase-II Upgrade of the LHC will increase its instantaneous luminosity by a factor of 7. At the HL-LHC, the number of proton-proton collisions in one bunch crossing increases significantly, putting more stringent requirements on the LHC detectors electronics.
The ATLAS Liquid Argon calorimeter measures the energy of produced particles produced and feeds the ATLAS trigger to identify...
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Yujing Gan03/10/2024, 16:40
Depleted Monolithic Active Pixel Sensors (DMAPS) using high-resistivity substrates offer a good signal-to-noise ratio for Minimum Ionizing Particle (MIP) detection as well as an enhanced radiation tolerance with respect to standard CMOS sensors. The fully depleted bulk and fast charge collection through drift enable the DMAPS technology for timing measurements in High Energy Physics (HEP)...
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Ali Khalilzadeh (Universite Libre de Bruxelles (BE))03/10/2024, 16:40
The High Luminosity Large Hadron Collider (HL-LHC) necessitates a complete replacement of the current Compact Muon Solenoid (CMS) silicon tracker due to harsh conditions. The Phase-2 Outer Tracker (OT) is designed with high radiation tolerance, increased granularity, and enhanced data rate handling. It will provide tracking data to the Level-1 trigger, maintaining sustainable trigger rates...
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Olena Manzhura03/10/2024, 16:40
The data acquisition system of the Micro-Vertex Detector in the PANDA experiment, including the recent advancements in the design of the data concentrator (MDC) ASIC, will be presented. The MDC is a local digital controller on the detector module. The contribution describes the entire readout chain, encompassing the double-side microstrip sensors, the ToASt front-end ASICs, the MDC, the lpGBT...
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Abhijeet Ghodgaonkar (Tata Inst. of Fundamental Research (IN))03/10/2024, 16:40
The high luminosity operation of the LHC will deliver collisions with a luminosity about 10 times the original design value. This poses a big challenge for trigger and data acquisition due to nearly 200 overlapping collisions, called pile up, within the same bunch crossing. Disentanglement of the pileup particles from those of interesting physics processes is achieved by implementing the...
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Joan Mauricio (ICCUB)03/10/2024, 16:40
A phase locked loop (PLL) and a time to digital converter (TDC) have been developed for the FastIC+ chip, an 8-channel ASIC to readout fast timing detectors. The chip is designed to work with sensors such as multi-anode photo multipliers (MAPMTs), microchannel plates (MCPs), silicon photomultipliers (SiPMs), among others. The PLL generates the clock reference for the whole chip, including a...
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Devanshu Kiran Panchal (University of Texas at Austin (US))03/10/2024, 16:40
The COLUTA ASIC is an 8-channel, 15-bit, 40 MSPS, analog-to-digital (ADC) converter designed for the high-luminosity LHC (HL-LHC) upgrade of the Liquid Argon calorimeter readout electronics. The production version of the ADC meets and exceeds the specifications for the analog performance and the HL-LHC radiation tolerance. The production testing will be performed by a custom-designed robotic...
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Kai Wang (University of Chinese Academy of Sciences, Beijing 100049, China & Institute of High Energy Physics, Chinese Academy of Sciences)03/10/2024, 16:40
Based on the fourth generation synchrotron radiation light source, the stability of X-ray beam is an urgent problem to be solved in current cutting-edge experiments. This project is based on fast response time of diamond detectors. A fast response four channel weak current measurement and data acquisition circuit based on diamond detectors was developed using ADA4530. Experimental tests show...
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Matteo Lupi (CERN)03/10/2024, 16:40
Verification is a critical aspect of designing Front-end (FE) readout ASICs for High-Energy Physics (HEP) experiments. These ASICs share several similar functional features, resulting in similar verification objectives, which can be addressed using comparable verification strategies. This contribution presents a set of re-usable verification components for addressing common verification tasks,...
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Mr Shaogang Peng (Tsinghua University (CN))03/10/2024, 16:40
Special considerations have been made in the design to reduce digital state changes and ensure reliable operation, we tested the effectiveness of the protection by running separate chips inside the proton beam, and layout is that all chips concurrently fit into a 20 mm beam spot. The
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study of corrected bit flips in registers and actual SEEs in LCB and LP path is carried out under different... -
Frederic Morel (Centre National de la Recherche Scientifique (FR)), Jean Soudier (Centre National de la Recherche Scientifique (FR))03/10/2024, 16:40
Monolithic active pixel sensors are considered as the nominal choice for a large variety of particle physics experiments. Consequently, the design of pixel matrices faces a wide range of specifications.
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We developed a pixel matrix read-out architecture based on the local interconnection of asynchronous N:1 time arbiters with fixed priority. This architecture is not limited by global signals... -
Roland Koppenhöfer (Albert Ludwigs Universitaet Freiburg (DE))03/10/2024, 16:40
In preparation for the High-Luminosity-Upgrade of the Large Hadron Collider, new silicon strip detector modules need to be built for the ATLAS ITk strip tracker. The powerboard flexes in ITk strip modules are responsible for powering all readout electronics as well as controlling and monitoring module voltages, currents and temperatures. In total, about 6000 end-cap powerboards need to be...
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Jie Zhang (Institute of High Energy Physics(IHEP), Chinese Academy of Sciences(CAS))03/10/2024, 16:40
To mitigate the impacts of pileup caused by luminosity increase in the ATLAS Phase-II upgrade, the High Granularity Timing Detector (HGTD) is proposed to measure the timing of tracks precisely. The Peripheral Electronics Board (PEB) is an important part of the HGTD, which acts as a bridge between the front-end modules and the off-detector electronics. We have designed and produced a prototype...
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Xiangyu Xu (the High Energy Accelerator Research Organization, KEK)03/10/2024, 16:40
The COMET (COherent Muon to Electron Transition) experiment at J-PARC requires particle detectors on the beam axis for proton and muon-pion flux monitoring. The GAROP-2 (GAted-ReadOut Proton 2) is thus dedicatedly developed as the read-out electronics for the diamond or SiC monitors. The detectors and GAROP-2 are gated off at the proton pulse phase to prevent it from saturation. Added to this...
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Lucas Mollier (Universitaet Bern (CH))03/10/2024, 16:40
After Run III the ATLAS detector will undergo many upgrades to cope with the harsher radiation environment and increased number of proton interactions in the high luminosity phase of the LHC. One key project of this upgrade is the ATLAS Inner Tracker (ITk). The pixel detector of the ITk must be read out at 1,28Gb/s with a BER at 95%CL less than 10^-12. The Optosystem performs opto-electrical...
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Jie Zhang (Institute of High Energy Physics(IHEP), Chinese Academy of Sciences(CAS))03/10/2024, 16:40
The HGTD is a novel detector introduced to augment the new all-silicon Inner Tracker in the pseudo-rapidity range from 2.4 to 4.0, adding the capability to measure charged-particle trajectories in time as well as space. A prototype of Peripheral Electronics Board (PEB), which supports up to 55 front-end modules with 12 lpGBT, 9 VTRx+ and 52 bPOL12v, is developed to work as a bridge between the...
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Dr Aman Phogat (Hansraj College, University of Delhi)03/10/2024, 16:40
Resistive Plate Chambers (RPCs) are versatile detectors widely used in HEP experiments due to their excellent timing resolution and efficiency. However, conventional gas mixtures used in RPCs include C2H2F4 and SF6, freon-based gas mixtures with high global warming potential (GWP). So, a transition to eco-friendly gas is necessary to reduce the environmental impact and long-term operation of...
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Dr Pierluigi Casolaro (Universita Federico II e INFN Sezione di Napoli (IT))03/10/2024, 16:40
This work focuses on Total Ionizing Dose (TID) test of LVDS receivers that will be used for the readout system of the ATLAS muon barrel spectrometer within the High Luminosity (HL)-LHC program. We designed an experimental setup that allows to investigate TID effects on power consumption and signal integrity, including variations in amplitude, rise/fall time, jitter, signal-to-noise ratio, as...
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Ignacio Redondo Fernandez (CIEMAT - Centro de Investigaciones Energéticas Medioambientales y Tec. (ES)), Muhammad Bilal Kiani (Universita e INFN Torino (IT))03/10/2024, 16:40
The High Luminosity LHC upgrade requires a full revamp of CMS Drift Tubes (DT) electronics due to trigger rates exceeding current capabilities. Leveraging optical and bandwidth advancements, this upgrade redefines DT electronics architecture. On-detector functions are streamlined for data processing relocation to a more accessible back-end. The On-detector Board for Drift Tubes (OBDT) is...
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Luca FEDERICI (IPHC), Dr Luca Federici (CNRS-IPHC Strasbourg)03/10/2024, 16:40
This contribution presents the methodology and verification strategy for OBELIX, the monolithic active pixel CMOS sensor designed for the proposed upgrade of the Belle II vertex detector. Leveraging a dual verification approach with cocotb and UVM, we ensure the integrity of OBELIX's digital logic. This methodology addresses the complexities of ASIC design, which includes an 896x464 pixel...
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Francisco Piernas Diaz04/10/2024, 09:00
Particle tracking and imaging detectors are becoming increasingly complex, driven by demands for densely integrated functionality and maximal sensitive area. These challenging requirements can be met using 3D interconnect techniques widely used in industry. In this paper, we present the results of an evaluation of the 3D through-silicon-via (TSV) technology, using the Timepix4 integrated...
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Lorenzo Giannessi (Universite de Geneve (CH))04/10/2024, 09:00
T2K is a long baseline neutrino experiment, entering Phase II with a Near Detector upgrade.
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A challenge of T2K Phase II is the development and testing of the Front-end electronics boards
(FEB) for the read-out of the Super-FGD, new active tracking neutrino target. We hereby present
the performance tests confirming that the FEB aligns with design requirements, and the hardware
qualification... -
135. Development of a novel low-mass module flex PCB using nano-wire-based flip-chip interconnectionJulian Weick (CERN)04/10/2024, 09:20
In order to reduce the material budget and maximize the active area of sensors used in future experiments, a 30um thick lightweight flex has been produced. The presented fabrication technology coupled with novel interconnection technologies allows for compact packaging with a direct attachment of the chip connection pads to the flex. Beyond interconnection technologies such as Anisotropic...
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Georges Blanchot (CERN)04/10/2024, 09:20
The CMS Tracker Phase-2 Upgrade requires the production of new Strip-Strip (2S) and Pixel-Strip (PS) modules to cope with the requirements of the HL-LHC. All-together 47520 hybrid circuits are required to construct 8000 2S and 5880 PS modules. The hybrids pre-production phase is now completed. At first, a kick-off batch enabled the identification of different issues, that were resolved for the...
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Anthony Weidberg (University of Oxford (GB))04/10/2024, 09:40
The bus tapes required for ATLAS ITk strips are very challenging because of the data rates and lengths of the transmission lines. The impedances need to be very well controlled. The designs must allow for sensor operation at 500V. The required quality of the Ni/Au plating for wire bond pads is difficult to achieve for such large tapes. The tapes must be radiation tolerant and we have seen...
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Mr Patryk Szydlik (CERN)04/10/2024, 09:40
The Phase-2 Upgrade of the CMS Outer Tracker requires the manufacturing of 8000 Strip-Strip and 5880 Pixel-Strip modules, altogether incorporating 47520 hybrid circuits of 15 variants. To ensure complete functionality of the modules it is essential to perform production-scale testing of the hybrids before the module assembly. For that reason, a complex and scalable test system was designed,...
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Dr Matthew Basso (TRIUMF (CA))04/10/2024, 10:30
For the HL-LHC, the ATLAS experiment will replace its current Inner Detector with an all-silicon Inner Tracker (ITk), consisting of pixel and strip systems. In the end-cap, silicon sensor modules of the strip system are mounted onto support structures called “petals”. To facilitate the assembly of petals, an automated system has been developed for mounting which streamlines the production...
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Michael Wiebusch (GSI Helmholtzzentrum für Schwerionerforschung GmbH)04/10/2024, 10:30
This work presents Twin_Peaks_CFD1, a custom analog front-end card designed for the read-out of PMTs coupled to lanthanum bromide scintillators. It integrates 16 discrete analog constant fraction discriminators (CFDs) on a compact 12x10 cm board, providing precise timing information for nuclear lifetime measurements.
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The design emphasizes cost-effectiveness, utilizing off-the-shelf discrete... -
Meghana Patil (Karlsruhe Institute of Technology)04/10/2024, 10:50
Designed for accelerator beam diagnostics and photon science applications, KALYPSO is a line array camera that stands out for its high-speed performance with the ability to operate at rates upto 12 Mfps in continuous readout mode while maintaining full occupancy. In this contribution, the KALYPSO system with sensor based on TI-LGAD is presented. The latest version of this system is employed...
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Francesco Costanza (Centre National de la Recherche Scientifique (FR))04/10/2024, 10:50
The ATLAS ITk Pixel system requires large-scale flex circuits for low-voltage power, high-voltage sensor bias, and command/data transmission due to tight space constraints. This reports will focus on the design and production of the services that runs from the modules and the first patch panel of the ITk Pixel Outer Barrel. The results from the quality control tests on the pre-production (10%...
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Mauro Iodice (INFN - Sezione di Roma Tre)
The New Small Wheel is a detector designed for the CERN ATLAS experiment, ensuring tracking resolution and efficiency in the LHC high-luminosity era. Comprising Micromegas and small-strip Thin Gap Chamber technologies, it reduces the rate of invalid data acquisition requests in a cavern background-sensitive region. The focus of this contribution is the electronics of its trigger processor,...
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