Speaker
Description
The L0MDT muon track finder algorithm will be implemented on the MDT Trigger Processor (MDTTP) ATCA board, featuring an AMD xcvu13p FPGA. To validate this, we propose using a 2020 demonstrator board (equipped with two AMD XCZU11EG FPGAs and three DDR4 modules) to emulate data flow.The demonstrator will simulate incoming signals from L0Muon systems (Front-End and Sector Logic) and internal MDTTP macroblocks. ATLAS Monte-Carlo or experimental data can be stored in the DDR4 memories and streamed at each clock cycle to mimic high-speed detector signals. This data is transferred via optical transceivers to the MDTTP board. As a primary use case, we present the validation of the transverse momentum ($p_T$) calculation block. We compare two approaches: a traditional empirical formula and a novel machine-learning algorithm implemented via hls4ml. This setup ensures the hardware can handle the rigorous demands of the ATLAS trigger system.
| Talk's Q&A | N.A. |
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| Talk duration | N.A. |
| Will you be able to present in person? | Yes |