11–15 Feb 2013
Vienna University of Technology
Europe/Vienna timezone

Monolithic pixel detectors with 0.2 um FD-SOI pixel process technology

14 Feb 2013, 14:50
20m
Vienna University of Technology

Vienna University of Technology

Gußhausstraße 25-29, 1040 Wien (Vienna), Austria

Speaker

Dr Toshinobu Miyoshi (High Energy Accelerator Research Organization (JP))

Description

Truly monolithic pixel detectors were fabricated with 0.2 um SOI pixel process technology by collaborating with LAPIS Semiconductor Co., Ltd. for particle tracking experiment, X-ray imaging and medical application. CMOS circuits were fabricated on a thin SOI layer and connected to diodes formed on the silicon handle wafer through the buried oxide layer. We can choose the handle wafer and therefore high-resistivity silicons are also available. When Float Zone (FZ-) SOI wafers in which the thickness is about 500 um are used as the handle wafer, it can be fully-depleted with back-bias voltages of about 100 V. Double SOI (D-SOI) wafers fabricated from Czochralski(CZ)-SOI wafers were newly obtained and successfully processed in 2012. The top SOI layers are used as electric circuits and the middle SOI layers used as a shield layer against the back-gating effect, the cross-talk between sensors and CMOS circuits, and the total ionizing dose (TID) effect. KEK organizes Multi Project Wafer (MPW) runs in every year, in which many designs provided by Universities and institutions over the world are put together. In 2012, we developed several types of pixel detectors and some transistor test chips. Characteristics of the transistors and sensors fabricated with D-SOI were compared with that with single SOI. In presentation, the up-to-date test results will be shown.
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Primary author

Dr Toshinobu Miyoshi (High Energy Accelerator Research Organization (JP))

Co-authors

Mr Ayaki Takeda (SOKENDAI) Mr Hirofumi Tadokoro (National Institute of Advanced Industrial Science and Technology) Prof. Kazuhiko Hara (University of Tsukuba (JP)) Mr Kazuya Tauchi (High Energy Accelerator Research Organization (JP)) Mr Masashi Yanagihara (National Institute of Advanced Industrial Science and Technology) Dr Morifumi Ohno (National Institute of Advanced Industrial Science and Technology) Dr Ryo Ichimiya (High Energy Accelerator Research Organization (JP)) Mr Shinya Nakashima (Kyoto University) Mr Syukyo Gando Ryu (Kyoto University) Mr Tadashi Chiba (National Institute of Advanced Industrial Science and Technology) Mr Takashi Kohriki (High Energy Accelerator Research Organization (JP)) Prof. Takeshi Tsuru (Kyoto University) Dr Toru Tsuboyama (High Energy Accelerator Research Organization (JP)) Prof. Yasuo Arai (High Energy Accelerator Research Organization (JP)) Dr Yasushi Igarashi (National Institute of Advanced Industrial Science and Technology) Dr Yoichi Ikegami (High Energy Accelerator Research Organization (JP)) Mr Yoshimasa Ono (Tohoku University) Prof. Yoshinobu Unno (High Energy Accelerator Research Organization (JP)) Mr Yowichi Fujita (High Energy Accelerator Research Organization (JP)) Ms Yukiko Ikemoto (High Energy Accelerator Research Organization (JP))

Presentation materials