Mr
Dominique Breton
(Laboratoire de l''Accelerateur Lineaire (LAL) (IN2P3) (LAL))
18/09/2008, 16:15
Poster
The new Matacq14 board described in this paper has been designed to digitize 4 channels with 14 bits of resolution at 2 GS/s with an analog bandwidth of 345 MHz. It is not based on commercial ADCs which don’t reach these specifications, but on the low-power custom-designed analog circular memory called MATACQ. It can be triggered internally or externally, and several boards can easily be...
gerard bohner
(LPC Clermont Ferrand)
18/09/2008, 16:15
Poster
The resolution needed in the CMOS sensors of the ILC vertex detector implies a digitization of each pixel by a small, 4-5 bits, dedicated ADC.
The ADC characteristics, given by the constraints of the pixel matrix and its read out are for one ADC per column : 10 MS, 25 micron width and about 1mW consumption, thank to the fact that this power could be turn off 99 % of the time.
To fit these...
Sebastien crampon
(LPC Clermont Ferrand)
18/09/2008, 16:15
Poster
This paper describes the front end electronic developed for the IN2P3 INNOTEP project by the pole microelectronic Rhone Auvergne. (Collaboration LPC Clermont Ferrand and IPNL Lyon).
This circuit handles the signals coming from LSO crystals trough photo detectors (APD, PM...), and has to provide energy and time measurement, with medium accuracy (8 bits) for the energy but very high accuracy...
Prof.
Jingbo Ye
(Southern Methodist Univeristy)
18/09/2008, 16:15
Poster
The GOL ASIC is a serializer chip developed by CERN based a 0.25 μm CMOS technology. The GOL operates with two data rate: 800 Mbps and 1.6 Gbps. This ASIC has been evaluated for the ATLAS Inner Detector readout upgrades for the SLHC. A demo link is being designed to read out test staves through fiber optics and study system issues in a giga-bit optical link. The results of the radiation...
Mr
Christian Mester
(CERN)
18/09/2008, 16:15
Poster
A multi-channel time-tagging Time-to-Digital Converter (TDC) ASIC with a resolution of 24.4 ps (bin size) has been implemented and submitted for fabrication in a 130 nm CMOS technology. An on-chip PLL is used to generate an internal timing reference from an external 40 MHz clock source. The circuit is based on a 32 element Delay Locked Loop (DLL) which performs the time interpolation. The 32...
Mr
Stefano Michelis
(CERN)
18/09/2008, 16:15
Poster
Given the larger number of channels and the need for reduced material budget in the SLHC trackers, alternatives to the present power distribution scheme have to be explored. In this context we are envisaging a new architecture based on custom switching converters able to work in the high radiation and high magnetic field environment of the experiments. A prototype of the converter has been...
Masatosi Imori
(ICEPP, University of Tokyo)
18/09/2008, 16:15
Poster
A prototype of the low voltage power supply is implemented with a piezoelectric transformer provided by Tokin Corporation lately, where the piezoelectric transformer realizes ground isolation between the primary and the secondary. The low voltage power supply, integrating the piezoelectric transformer, produces the regulated output voltage of 1.5 V from the supply voltage around 48 V.
A...
Vladimir Gromov
(NIKHEF)
18/09/2008, 16:15
Poster
A Current-summing Bandgap reference circuit, has been developed in a 0.13um CMOS technology.
The reference current has low sensitivity to temperature and power supply variations.
In the design we utilize only CMOS structures (instead of diodes) and poly-silicon resistors.
The combination of the natural properties of the thin gate oxide MOS transistors with gate-all-around layout, results...
Mr
Attila Hidvegi
(Stockholm University - Physics Dept.)
18/09/2008, 16:15
Poster
The TileCal hadron calorimeter in the ATLAS detector contains about 2000 digitizer boards, developed and maintained by Stockholm University. A rather complex test system has until now been used to verify the functionality of the boards. However, it was built almost 10 years ago and is now in itself difficult to maintain since it consists of several already obsolete parts. The development of a...
Raffaele Giordano
(Universita’ di Napoli ‘Federico II’ and INFN Sezione di Napoli, Napoli (Italy))
18/09/2008, 16:15
Poster
The double edge Source Synchronous Transfer (2eSST) is the fastest block transfer cycle offered by the VME64x standard. The maximum achievable data-rate foreseen by the protocol is 320 Mbyte/s.
In this paper we present a reference design based on a FPGA for the reader willing to implement 2eSST in his VME64x application. By using this template, we have designed a custom Bit Error Rate Tester,...
Dr
Jinlong Zhang
(Argonne National Laboratory (ANL))
18/09/2008, 16:15
Poster
The ATLAS detector will be exposed to proton proton collision at the center of mass energy of 14 TeV with the bunch crossing rate of 40 MHz. In order to reduce this rate down to the level at which only interesting events will be fully reconstructed, a three-level trigger system has been designed. The level 1 (LVL1) trigger reduces the rate down to 75 kHz via the custom-built electronics. The...
Mr
Georges Blanchot
(CERN)
18/09/2008, 16:15
Poster
The upgrade of the LHC experiments sets new challenges for the powering of the detectors. One of the powering schemes under study is based on buck converters mounted on the front-end modules. The switching noise emitted by these converters is susceptible to affect the performance of the powered systems. A model to identify and to control the noise sources of the converter was developed. A...
Alexander Singovski
(Tate Lab.of Physics, High Energy Physics)
18/09/2008, 16:15
Poster
The CMS ECAL Low Voltage system is made of 136 WIENER MARATON power supplies, delivering about 250kW of power to the on-detector electronics. The system is controlled by the PVSS-based Detector Control System (DCS), which communicates with the MATATON local controllers via 11 CANbus brunches. The stability of the 2.5V power, delivered to the Very-Front-End electronics is controlled by the DCU...
Mr
Daniel Ricci
(CERN)
18/09/2008, 16:15
Poster
The installation of over 55000 optical links for the readout and control of the CMS Tracker, ECAL and Pixel detectors is now completed at CERN LHC Point 5. During the 2007 cabling campaign 672 optical cables that span between the experimental and service caverns were installed and tested. The connection to the optical, highly dense, patch-panels inside CMS followed in the first months of 2008....
Dr
Filippo Costa
(Department of Physics & INFN Bologna)
18/09/2008, 16:15
Poster
The data concentrator card CARLOSrx is a readout board developed for the ALICE ITS Silicon Drift Detector (SDD) experiment held at CERN.
CARLOSrx is a 9Ux400 mm VME board, containing 4 FPGAs with the purpose of processing data coming from 12 SDD detectors and sending them to a computer running the DATE software.
We have 24 CARLOSrx installed at CERN, each CARLOSrx is able to receive data...
Dr
Robert John Bainbridge
(HEP group, Imperial College London)
18/09/2008, 16:15
Poster
The CMS silicon strip tracker is the largest device of its type ever built for the detection of charge particles produced in beam-beam collisions. There are 24244 single-sided micro-strip sensors covering an active area of over 200 square meters and nearly ten millions of readout channels. The sub-detector was installed inside CMS in December 2007. We report on detector performance studies...
Dr
Géza Székely
(MTA Atomki, Debrecen, Hungary)
18/09/2008, 16:15
Poster
During the past years our group has built, calibrated, and finally installed all the components of the Muon Barrel Alignment System of the CMS experiment. This paper covers the results of the hardware commissioning, the full system setup and the connection to the CMS Detector Control System (DCS). The step-by-step operation of the system is discussed: from collecting the analog video signals...
Dr
Murrough Landon
(Queen Mary, University of London)
18/09/2008, 16:15
Poster
The ATLAS first-level calorimeter trigger is a hardware-based system designed to identify high-pT jets, electron/photon and tau candidates and to measure total and missing ET in the ATLAS calorimeters. The complete trigger system consists of over 300 custom designed VME modules of varying complexity. These modules are based around FPGAs or ASICs with many configurable parameters, both to...
Mr
Jad Marrouche
(Imperial College London)
18/09/2008, 16:15
Poster
A new trigger component based on the uTCA standard is being developed for the CMS Global Calorimeter Trigger (GCT). The new system is designed to handle the exchange of data between GCT and the Global Muon Trigger and is called the GCT Muon System. The GCT muon system consists of a uTCA crate with a custom uTCA backplane instrumented with several Matrix processor cards, which use a Xilinx...
Mr
Mircea Bogdan
(The University of Chicago)
18/09/2008, 16:15
Poster
We present the proposed Data Acquisition (DAQ) System for the KL Experiment at J-Parc, Japan. It comprises three distinctive flavors of 6U VME boards: a 14-bit, 125 MHz ADC module for reading out an approximately 3000-channel Cesium-Iodide (CsI) detector; a 12-bit, 500 MHz ADC module for reading out a 100-channel Beam Hole Phase Veto (BHPV) detector; and a digital Trigger module able to...
Dr
Satish Dhawan
(Yale University)
18/09/2008, 16:15
Poster
Our group is researching commercial power converters having voltage ratios greater than ten that are capable of running in the ATLAS Silicon Tracker high luminosity upgrade environment. The devices therefore must operate in a high magnetic field (2 T) and be radiation hard to ~50-100 MRad and ~ 1015 neq/cm2. These converters are to be mounted on the same multi-chip modules as the ASIC readout...
Mohsine Menouni
(Unknown)
18/09/2008, 16:15
Poster
The single event upset (SEU) tolerance of various latch designs in 0.13um CMOS technology has been studied by both measurement and simulation. The aim of this work is to optimize the design for critical registers on the next generation pixel readout chip for ATLAS upgrades (denominated FE-I4). Results form irradiations with 24 GeV protons will be presented and compared to previous values...
Ms
Winnie Wong
(CERN)
18/09/2008, 16:15
Poster
Medipix3 is a single photon-counting hybrid pixel detector which records the discrete number of photons incident on a pixel. It aims to diminish the effects of charge diffusion across the sensor volume by considering the total charge collected by all pixels within a local neighbourhood during the evaluation of a charge event. The integration of multiple functions within the compact pixel area...
Diogo Di Calafiori
(ETH Zurich, Switzerland)
18/09/2008, 16:15
Poster
A full scale implementation of the Detector Control System (DCS) for the electromagnetic calorimeter (ECAL) in the CMS experiment is presented.
The operational experience from the ECAL commissioning at the CMS experimental cavern and from the first ECAL and global CMS data taking runs is discussed and summarized.
Dr
Fernando Arteche
(Instituto Tecnológico de Aragón)
18/09/2008, 16:15
Poster
The electromagnetic noise characterization of the FEE and the compatibility of the different systems are important topics to consider during the experiment upgrades. A new power distribution scheme based on switching power converters is under study and will define a noticeable noise source very close to the FEE detector electronics. The knowledge of the FEE noise issues in previous detectors...
Prof.
Stylianos Siskos
(Aristotle Univ. of Thessaloniki, Physics Dept., Electronics Lab.,)
18/09/2008, 16:15
Poster
An advanced VLSI analog readout architecture, dedicated for X-ray imaging. Critical design issues such as the noise optimization and the shaper implementation technique are addressed and the first test results of a fabricated prototype in a 0.35 μm 3.3 V CMOS process are presented. Important feature of the design is the novel CR-RC2 pulse shaper configuration since in this section,...
Mr
Manuel Koch
(University of Bonn - Physikalisches Institut)
18/09/2008, 16:15
Poster
The DEPFET sensor is a favorable technology for use in particle physics experiments. The current system is developed for application in the vertex detector of the planned International Linear Collider (ILC). Besides high spatial resolution, low noise and a low material budget a very high readout speed is required. A new prototype readout system has been built; utilizing a new generation of...
Mr
FREDERIC DULUCQ
(Laboratoire de l Accelerateur Lineaire)
18/09/2008, 16:15
Poster
PARISROC is the front end ASIC designed to read 16 PMT for neutrino experiments. It’s able to shape, discriminate, convert and readout data in an autonomous mode. The digital part manages each channel independently thanks to 4 modules: top manager, acquisition, conversion and readout. Acquisition is in charge to manage the SCA with a depth of 2 for charge and fine time measurement. Coarse time...
Mr
Alejandro Gil-Ortiz
(IFIC)
18/09/2008, 16:15
Poster
This contribution presents the power supply system designed for the frontend electronics of the HADES RPC detector, installed at GSI (Darmstadt, Germany). The system is designed as a distributed architecture and contains custom Low Voltage boards based on DC-DC switching converters to obtain high efficiency and reduce spacing. The switching converters have been conveniently filtered to reduce...
Dr
Anatoli Konoplyannikov
(Institute for Theoretical and Experimental Physics (ITEP))
18/09/2008, 16:15
Poster
All calorimeter sub-detectors in LHCb, the Scintillator Pad Detector (SPD), the Preshower detector (PS), the Electromagnetic Calorimeter (ECAL) and the Hadron Calorimeter (HCAL) are equipped with the Hamamatsu photomultiplier tubes (PMT) as devices for light to electrical signal conversion. The PMT gain behavior is not stable in a time, due to changes in the load current and due to...
Mr
Daniel Eriksson
(Department of Physics-Stockholm University)
18/09/2008, 16:15
Poster
There are many reasons for keeping the number of communication fibers in a data acquisition system to a minimum. We are therefore evaluating different schemes for using Wavelength Division Multiplexing (WDM) techniques. WDM is a useful tool for achieving high data bandwidths when up scaling current systems and to allow fiber sharing between multiple data sources. Different strategies such as...
Ermanno Imbergamo
(Univ + INFN)
18/09/2008, 16:15
Poster
We present the design of the trigger and DAQ system for NA62, with
emphasis to the first level of trigger (L0).
The L0 level runs on-line and is designed as a segment of the DAQ chain.
FPGAs are used to evaluate fast trigger conditions, entirely on
the digitized information from read-out electronics.
In this way, the whole digitized information from detector is available
for...
Mr
Florian Herrmann
(Fakultaet fuer Physik - Albert-Ludwigs-Universitaet Freiburg)
18/09/2008, 16:15
Poster
Many experiments in physics with high data rates, short analog signal pulses (40ns), fast rising edges and large dynamic ranges require transient recorders with very high resolution. Additionally double pulses can occur on many spectroscopy experiments, like the COMPASS recoil proton detector. These pulses are recorded and separated by numerical digital processes to extract time and amplitude...
Dr
Jose Torres
(Universidad de Valencia)
18/09/2008, 16:15
Poster
Traditionally, Optimal Filtering Algorithm has been implemented using general purpose programmable DSP chips. Alternatively, new FPGAs provide a highly adaptable and flexible system to develop this algorithm.
TileCal ROD is a multi-channel system, where similar data arrives at very high sampling rates and is subject to simultaneous tasks. It include different FPGAs with high I/O and with...
Dr
Daniel Lacarrere
(CERN)
18/09/2008, 16:15
Poster
The grounding, shielding and cooling issues are important factors in the design and the maintenance of all the electronics systems. Inadequate grounding, shielding or cooling can lead to unreliable operation of the sub-detectors. This paper provides an overview on the LHCb strategy and achievements in the field of grounding, shielding and cooling for the electronics equipments.
Dr
Salvatore Loffredo
(Dipartimento di Fisica, INFN Sezione di Roma Tre and Università di Roma Tre)
18/09/2008, 16:15
Poster
Two high-resolution time-interval measuring system implemented in a SRAM-based FPGA device are presented. The two methods ought to be used for time interpolation within the system clock cycle. We designed and built a PCB hosting a Virtex-5 Xilinx FPGA and high stability oscillators to test the two different architectures. In the first method, dedicated carry lines are used to perform fine time...
Mr
Detlef Swoboda
(CERN)
18/09/2008, 16:15
Poster
The ALICE Zero Degree Calorimeters (ZDC) have been installed to either side of the LHC IP2 in the machine tunnel next to the dipole magnet D2. The calorimeter modules are mounted on a special table equipped with a mechanism to lower the modules away from the beam orbit during injection and acceleration. During stable operation the modules can be raised individually to be aligned with the beam...
Dr
Attila RACZ
(CERN)
18/09/2008, 16:15
Poster
This paper describes in detail the infrastructures/installation of the CMS on-line
computing center (CMSCC) and its associated monitoring system .
In summer 2007, 640 readout Units/builder Units have been deployed along with ~150 servers for DAQ general services. Since summer 2008, ~500 filter units have been added and today, the CMSCC has an on-line processing capability sufficiant for a...
Luigi Gaioni
(Università di Pavia, I-27100 Pavia, Italy)
18/09/2008, 16:15
Poster
This work describes a laboratory instrument that was developed to characterize the gate current noise performances of CMOS devices with minimum feature size in the 100 nm span. As a consequence of the reduction of the gate oxide thickness, these devices are affected by a non-negligible gate current due to direct tunneling phenomena. In this paper, the analysis of this noise contribution is...
Mr
Christophe VESCOVI
(LPSC/CNRS/IN2P3/UJF)
18/09/2008, 16:15
Poster
The Italian National Centre for Oncological hAdrontherapy (CNAO) is undergoing its final construction phase in Pavia and will use proton and carbon ion beams to treat patients affected by solid tumors. At the hearth of CNAO is a 78 meters circumference synchrotron, capable of accelerating particle up to 400 MeV/u with a repetition rate of 0.4 Hz. Particle acceleration is done by a unique...
Dr
Domenico Lo Presti
(CATANIA UNIVERSITY - PHYSICS DEPARTMENT)
18/09/2008, 16:15
Poster
A proposal for a new front-end architecture intended to
capture signals in the optical module of an underwater
neutrino telescope is described. It concentrates on the
problem of power consumption, signal reconstruction, charge
and time precision. Preliminary test results on a
demonstration board are shown.
Mr
Mikhail Matveev
(Rice University)
18/09/2008, 16:15
Poster
In this paper we discuss two ideas related to the design and application of mezzanine cards in the Endcap Muon (EMU) Cathode Strip Chamber (CSC) electronic system at the CMS experiment at CERN. The first is a proposal to upgrade the FPGA-based mezzanine cards using the most advanced Xilinx Virtex-5 family of FPGA. The second is related to design of a simple and compact mezzanine card with a...
Prof.
Stylianos Siskos
(Aristotle Univ. of Thessaloniki, Physics Dept., Electronics Lab., Thessaloniki, Greece)
18/09/2008, 16:15
Poster
In this work, a detailed comparison of four equivalent charge-sensitive, folded-cascode amplifiers in terms of noise performance is presented. A couple of complementary structures, one with a noise-optimised input nMOSFET and the other with a noise-optimised input pMOSFET were designed in 0.35 um CMOS process by Austria MicroSystems (AMS). Another couple of complementary structures consisting...
Dr
Anthony Weidberg
(Nuclear Physics Laboratory)
18/09/2008, 16:15
Poster
The optical links for the SCT have all been installed in ATLAS and are now used for data taking. This talk will review the processes required for the commissioning the links and the tools used to set-up the links and monitor their performance. This allows for an assessment of the current quality of the optical links as well as starting to monitor their long term performance. The methodology...
Dr
B. Todd Huffman
(University of Oxford)
18/09/2008, 16:15
Poster
The luminosity upgrade for the LHC (SLHC), will require new inner detectors capable of operating in the harsher SLHC environment. The expected SLHC doses are a factor of four times higher than those assumed for the LHC detectors. An optical readout system is planned for which all on-detector components must be significantly more radiation tolerant than was required for the current LHC...
Dr
Gisele Martin-Chassard
(IN2P3/OMEGA-LAL)
18/09/2008, 16:15
Poster
PARISROC is a complete read out chip in AMS SiGe 0.35m technology for photomultipliers array. It is made to allow triggerless acquisition for next generation neutrino experiments. The ASIC integrates 16 independent channels with variable gain and provides charge and time measurement by a 12-bit ADC and a 24-bits Counter.
Dr
David Cussans
(University of Bristol)
18/09/2008, 16:15
Poster
In the current CMS tracker power cables constitute a substantial
fraction of its dead-material. In an upgraded tracker for an SLHC the
current scheme of supplying power independently to each module is
unlikely to be tenable due to excessive dead-material. A review of
the current ideas for power distribution for a CMS tracker at the SLHC
are presented, the experimental methods used to...
Dr
Miguel Ullán
(CNM-IMB (CSIC), Barcelona)
18/09/2008, 16:15
Poster
SiGe BiCMOS technologies are being proposed for the Front-end readout of the detectors in the middle region of the ATLAS-Upgrade. The radiation hardness of the SiGe bipolar transistors is being assessed for this application through irradiations with different particles. Biasing conditions during irradiation of bipolar transistors or circuits have an influence on the damage and there is a risk...
Dr
Robert Frazier
(H.H. Wills Physics Laboratory)
18/09/2008, 16:15
Poster
The CMS Global Calorimeter Trigger (GCT) is the device within the CMS Calorimeter Trigger system which is assigned the tasks of finding and sorting forward-, central- and tau-jet candidates, sorting isolated and non-isolated electron candidates, and reading out all the calorimeter trigger data. The GCT system is modular and uses 1.6 Gbps optical links to concentrate the calorimeter data in...
Mr
Julien Fleury
(LAL - Omega)
18/09/2008, 16:15
Poster
Integration and low-power consumption of the read-out ASIC for the International Linear Collider (ILC) 82-million-channel W-Si calorimeter must reach an unprecedented level as it will be embedded inside the detector. Uniformity and dynamic range performance has to reach the accuracy to achieve calorimetric measurement. A first step towards this goal has been a 10,000-channel physics prototype...
Daniel Charlet
(Laboratoire de l''Accelerateur Lineaire (LAL) (IN2P3) (LAL))
18/09/2008, 16:15
Poster
The LHCb sub-detector electronics requires a configuration bus able to communicate efficiently and reliably over an up to 120-meter line, between a master, located in the counting room which is not exposed to radiation, and up to 32 slaves located on the detector close to electronics boards. The slaves have been developed in order to work properly in radiation exposed environment (up to...
Tony Rohlev
(Sincrotrone Trieste)
18/09/2008, 16:15
Poster
FERMI@ELETTRA is a 4th generation light source under construction at Sincrotrone Trieste. It will be operated as a seeded FEL driven by a warm S-band Linac which places very stringent specifications on control of the amplitude and phase of the RF stations. The local clock generation and distribution system at each station will not be based on the phase reference distribution but rather on a...
Dr
Rainer Stamen
(University of Heidelberg)
18/09/2008, 16:15
Poster
The ATLAS Level-1 Calorimeter trigger is a hardware-based system which aims to identify high-pt objects within an overall latency of 2.5us. It is composed of a Preprocessor system which digitises 7200 analogue input channels, determines the bunch crossing of the interaction, and provides a fine calibration; and two subsequent digital processors.
The Preprocessor system needs various...
Cesar Torcato De Matos
(University of Minho)
18/09/2008, 16:15
Poster
The ALICE Silicon Pixel Detector (SPD) optical data stream includes 1200 Fast-OR signals indicating the presence of at least one pixel hit in each of the detector readout chips. The Pixel Trigger (PIT) extracts the Fast-OR signals from the data lines and processes them to contribute to the Level 0 trigger in the ALICE Central Trigger Processor (CTP).
We present here the design, the...
Francesco Crescioli
(Univ. of Pisa + INFN Pisa)
18/09/2008, 16:15
Poster
Modern experiments search for extremely rare processes hidden in much larger background levels. As the experiment complexity and the accelerator backgrounds and luminosity increase we need increasingly complex and exclusive selections to be efficient selecting the rare events inside the huge background. We present a fast, high-quality, track-based event selection for the self-triggered SLIM5...
Dr
Sergei Lusin
(Fermi National Accelerator Laboratory (FNAL))
18/09/2008, 16:15
Poster
The power system for the on-detector electronics of the CMS Experiment comprises approximately 12000 low voltage channels, with a total power requirement of 1.1 MVA.
The radiation environment inside the CMS experimental cavern combined with an ambient magnetic field reaching up to 1.3 kGauss at the detector periphery severely limit the available choices of low voltage supplies, effectively...
Mr
Olivier Gutzwiller
(Conseil Europeen Recherche Nucl. (CERN))
18/09/2008, 16:15
Poster
ATLAS is the largest particle detector at the new accelerator Large Hadron Collider (LHC), scheduled to start operations in summer 2008 at CERN in Geneva, Switzerland. ATLAS will study proton-proton collisions at the unprecedented energy of 14TeV. In order to guarantee efficient and safe operation of the ATLAS detector, an advanced Detector Control System (DCS) has been implemented. With more...
Dr
Massimiliano Bitossi
(INFN PISA)
18/09/2008, 16:15
Poster
The MAGIC telescope is the world’s largest gamma ray telescope, designed to look at the light emitted by air shower by Cherenkov effect. It is operating since 2004 at the Roque de Los Muchachos observatory, La Palma, Canary islands. MAGIC-II is the upgrade of the project, consisting of a twin telescope frame with innovative features like new photon detectors to lower the threshold energy...
Dr
Olivier Bob
(Max Planck Institute for Physics, Munich)
18/09/2008, 16:15
Poster
The Liquid Argon Jet Trigger, installed in the H1 experiment at HERA,
implements in 800 ns a real-time cluster algorithm by finding local
energy maxima, summing their immediate neighbors, sorting the
resulting "jets" by energy, and applying topological conditions. It
operated since the year 2006 and drastically reduced the thresholds
for triggering on electrons and jets.
Mr
Gueorgui Antchev
(CERN PH-TOT)
18/09/2008, 16:15
Poster
The TOTEM Roman Pot Motherboard (RPMB) is the main component of the Roman Pot front-end electronic system. It is mounted on the Roman Pot between detector hybrids and patch panel. The RPMB main objectives are to acquire on-detector data and trigger information from up to 10 hybrids, to perform data conversion form electrical to optical format and to transfer it to the next level of the system....
Dr
Paul Aspell
(CERN)
18/09/2008, 16:15
Poster
VFAT is the front-end ASIC designed for the charge readout of silicon and gas detectors within the TOTEM experiment of the LHC.
A stand alone portable Totem Test Platform (TTP) with USB interface has been developed for the systematic testing of the TOTEM hybrids equipped with VFAT chips. This paper is divided into 3 sections; the first describes the hardware features of the TTP, the second...
