Speaker
Description
Summary
The PETA4 ASIC is the latest member of a family of chips targeted mainly at the readout of Silicon Photomultipliers in PET, with possible use in other detector applications.
PETA4 houses 36 channels on a 5x5mm2 die and is fabricated in the UMC 180nm technology. It uses bump bonds with a convenient pitch of ~270um to allow the construction of very compact modules at moderate substrate cost. The chip requires nearly no external components by integrating everything (PLL loop filter, bandgap reference, bias DACs,...) on chip. Power consumption is <40mW per channel, depending on digital speed and bias settings.
Every channel has two independent frontends: An established differential amplifier which has shown to be insensitive to pickup in the target application of PET/MRI, and a single ended frontend with very low input impedance (Zin~7 Ohms) for high channel count operation. A fast discriminator with tunable threshold and a noise of <300uV self-triggers time stamping with a bin width of 50ps as well as an integrator with programmable integration time. The amplitude signal is converted by a ~9 Bit SAR ADC. After conversion, events with sufficient amplitude are queued for serial readout.
The previous chip version PETA3 has achieved a CRT time resolution of ~200ps when reading out scintillation light from a 3x3x5mm3 LYSO crystal coupled at room temperature to a 3x3mm2 SiPM from FBK. Energy resolution for LYSO is ~12.5%. LYSO Crystals of 1.3mm size could be clearly identified with SiPMs of 4x4mm2 when using a light spreader.
The architecture of PETA4 and its performance in the lab and with SiPMs will be presented.
