Rad-hard High Speed LVDS Driver and Receiver

1 Jul 2014, 12:10
20m
503-1-001 (CERN)

503-1-001

CERN

Speaker

Mr Thierry MASSON (STMicroelectronics)

Description

A big challenge in data transmission is the constant increase in data-rate. Low Voltage Differential Signaling (LVDS) is a high speed, low power general purpose standard interface. Our paper presents LVDS driver and receiver circuits specifically designed, packaged and qualified for use in aerospace environment. The intended application of these devices (RHFLVDS31/32 quad drivers/receivers) is point to point baseband data transmission over controlled impedance media with 100 Ω characteristic impedance. A LVDS Driver and a LVDS Receiver have been processed in a 0.13um CMOS STMicroelectronics technology. The Driver accepts low voltage TTL input levels and translates them to low voltage (350mV) differential output signals. The Receiver accepts low voltage (100mV) differential LVDS input signals and translates them to TTL output levels. It can operate over a large common mode input range from -4V to +5V, using a new architecture, to ensure immunity of ground shifting and driver offset voltage, while supply voltage can vary from 3 to 3.6V. To this purpose, the common voltage input is sensed and adjusted to a fixed reference voltage 1.5V with an integrator loop and a class AB transconductor. These devices support data rates of 400 Mbps or equivalently a 200 MHz signal. These two LVDS circuits are designed for space applications. A total ionizing dose test campaign on elementary components has been performed to investigate the technology radiation hardness. The components have been radiated at high dose rate using a C060 gamma ray source. Specific mitigation techniques to achieve best in class hardness to total ionization dose and heavy ions have been applied. Moreover, the chosen technology has a substrate with very low resistivity which is very useful to decrease risks of latch up in general and more specifically Single Event Latch up. One major challenge of these LVDS circuits has been to meet particular ESD specifications which were 16kV on LVDS receiver input and driver output combined with SEL immunity. Laser tests have been useful to best understand their behavior regarding latch up. Both the Receiver and Driver have been evaluated in laboratory. Huge efforts and specific equipment have been necessary to measure properly propagation delays close to 1.7ns with good accuracy (better than 100ps). Finally, 300 krad in high dose rate and 150krad in low dose rate radiation tests have been performed successfully. Heavy ion Single Events Effects tests have also been performed with good results.

Primary authors

Mrs Colette MORCHE (STMicroelectronics) Mrs Sandrine NICOLAS (STMicroelectronics) Mr Thierry MASSON (STMicroelectronics)

Co-author

Mr Jean JIMENEZ (STMicroelectronics)

Presentation materials