Mrs
CERN
Author in the following contributions
- Test Bench Development for the Radiation Hard GBTX ASIC
- A TTC Upgrade Proposal Using Bidirectional 10G-PON FTTH Technology
- The eCDR-PLL IC, a Radiation-Tolerant ASIC for Clock and Data Recovery and Deterministic Phase Clock Synthesis
- The GBT-FPGA Core: Features and Challenges
- Clock and Timing Distribution in the LHCb Upgraded Detector and Readout System
- A Software Package for the full GBT Chipset Lifecycle
