Speaker
Description
In this presentation the read-out scheme will be introduced. Laboratory measurements have been done to characterize and optimize the analog electronic scheme and the FPGA VHDL code. The adaption process to different detector pulse shapes will be also shown. The results obtained at beam tests at the MAMI accelerator in Mainz and the SPS at CERN will be presented.
Summary
A Charge-to-Digital-Converter (QDC) and Time-to-Digital-Converter (TDC) based on a commercial FPGA (Field Programmable Gate Array) was developed to read out PMT signals of the planned HADES electromagnetic calorimeter (ECAL) at GSI Helmholtzzentrum für Schwerionenforschung GmbH (Darmstadt). The main idea is to convert the charge measurement of a detector signal into a time measurement, where the charge is encoded in the width of a digital pulse. The PaDiWa-AMPS front-end board for the TRB3 (General Purpose Trigger and Readout Board - version 3) which implements this conversion method was developed. The already well established TRB3 platform will provide the needed precise time measurements and serves as a data acquisition system.
In laboratory measurements a first prototype board was characterized and optimized in order to improve the charge and time precision, dynamic range and rate capability.
During a beam time with secondary photons at the MAMI accelerator in Mainz the read-out concept was successfully used to read-out PMTs of HADES ECAL modules. It showed excellent precision in providing charge and time measurement compared to much more complex read-out systems. During the HADES pion beam experiment the flexibility of the front-end was shown. The front-end electronics could be easily adjusted to small 0.8 inch PMTs.
The read-out concept is also foreseen to be used for the hadron calorimeter in the CBM experiment at the planned FAIR facility (Darmstadt). The adaption process is currently ongoing and tests of the concept will be performed at NA61/SHINE (SPS, CERN) which uses a similar hadron calorimeter.
