26-30 September 2016
Karlsruhe Institute of Technology (KIT)
Europe/Zurich timezone
<span style="font-size:18px"><BR><font color="red"> <span style="font-family:Myriad Pro">Extended Deadline for Proceedings : 15th November 2016</font>

Integrated Input Protection Against Discharges for Micro Pattern Gas Detectors Readout ASICs

28 Sep 2016, 16:36
1m
Building 11.40 Room 014 ()

Building 11.40 Room 014

Board: C5
Poster ASIC POSTER

Speaker

Dr. Tomasz Andrzej Fiutowski (AGH University of Science and Technology (PL))

Description

Immunity against possible random discharges inside active detector volume of the MPGDs is one of the key aspects that should be addressed in the design of the front-end electronics. This issue becomes particularly critical for systems with high channel counts and high density readout employing the front-end electronics built as multichannel ASICs implemented in modern CMOS technologies, for which the breakdown voltages are in the range of a few Volts. The paper presents the design of various input protection structures integrated in the ASIC and test results using an electrical circuit to mimic discharges in the detector.

Summary

One of the major problems that have to be addressed in the design of the front-end electronics for readout of MPGDs is its immunity against possible random discharges inside active detector volume. A commonly used solution to this problem is an input protection circuit built of discrete Surface Mount Device (SMD) components. Such a solution has, however, several drawbacks, including large area occupied by the SMD components and associated stray capacitance at the input, necessity of using advanced and expensive Printed Circuit Board (PCB) technologies, demanding assembly techniques, and high cost of the SMD components themselves. These issues become particularly critical for systems with high channel counts and high density readout employing the front-end electronics built as multichannel ASICs implemented in modern CMOS technologies.

With continuous downscaling of the CMOS technologies the breakdown voltages of transistors are becoming lower and lower and for any CMOS device input protection is needed to prevent damages during handling and assembling of such devices. Therefore, the problem of Electro Static Discharge (ESD) is being continuously investigated in the field of CMOS integrated circuits. The vendors of the CMOS technologies deliver recommended ESD protection circuits, which are qualified according to the standards used in the electronics industry. Within these standards the voltages vary in the range from 2kV to 10kV. Although the voltages are comparable with the voltages used for biasing the MPGDs the equivalent electrical circuit of a MPGD is different compared to the circuit used in the ESD protection. First of all, in case of a discharge occurring in the MPGD the resistance of the discharging path is much lower. Thus, a protection circuits against discharges in MPGDs have to handle much higher currents and the typical circuits recommended for protection against ESD are not adequate at all.

On the other hand, immunity of the front-end circuit against sparks occurring in MPGDs depends on the design of the front-end circuit itself, in particular on its input impedance. Therefore, the input protection circuit should be tuned specifically for a given type of the MPGD and given design of the input stage if one wants to minimize additional capacitance and resistance at the input, which will affect the noise performance of the system.

We demonstrated before [1] that integrated input protection could be quite robust against discharges expected in MPGDs. However, the prototype circuit was designed using a conservative approach resulting in large input capacitance. In this paper we will present test results of newly designed input protection structures. These structures have been designed using smaller devices resulting in smaller input capacitance. In addition, structures with series resistors have been implemented, which allow us to evaluate the trade-off between the input capacitance and the series resistance introduced by the protection circuits from the noise minimizing point of view. The ASIC was manufactured in the 350nm CMOS process.

[1] T. Fiutowski et al.: Front-end electronics for Micro Pattern Gas Detector with integrated input protection against discharges, 2016 JINST 11 C01036

Primary authors

Dr. Piotr Wiacek (AGH University of Science and Technology (PL)) Dr. Stefan Zenon Koperny (AGH University of Science and Technology (PL)) Dr. Tomasz Andrzej Fiutowski (AGH University of Science and Technology (PL)) Prof. Wladyslaw Dabrowski (AGH University of Science and Technology (PL))

Presentation Materials

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