26–30 Sept 2016
Karlsruhe Institute of Technology (KIT)
Europe/Zurich timezone

A New Profibus-DP Slave Interface Card for CERN’s Vacuum Sector Valve Controller

27 Sept 2016, 17:56
1m
Building 11.40 Room 014

Building 11.40 Room 014

Board: I5
Poster Systems POSTER

Speaker

Gregory Pigny (CERN)

Description

The vacuum control systems of CERN’s accelerators are based on PLCs, which communicate with controllers either with direct I/O, or via Profibus.
In order to improve the communication efficiency of the vacuum sector valve controllers using direct I/O, a low cost Profibus-DP slave interface card has been designed.
This paper describes the steps to design a Profibus-DP slave interface that can match user’s digital parallel bus. It presents the developed hardware and firmware, together with the corresponding assessment tests. It also flags the improvements of this new interface, in comparison with the previous system.

Summary

The new interface card follows the Eurocard 3U mechanical standard. It is supplied by 5V through the backplane connector. Line drivers interface the I/O to the backplane bus, towards the valve cards. The core of the card is an 8-Bit PIC® microcontroller (PIC18F6527) from Microchip®. It is supplied by 5V, and has 54 digital I/O and integrated SPI capability. The Profibus connection is managed by the VPC3+S ASIC from Profichip®. This ASIC is supplied by 3.3V and has I/O 5V tolerant. It uses SPI to communicate with the microcontroller, needs a 48MHz external oscillator supplied by 3.3V and can provide a clock source of 24 MHz for other devices. Additionally, an isolated 5V supply is used for the Profibus side of the RS-485 transceiver, which is galvanically isolated. For clocking the microcontroller, three options were considered: internal 8MHz oscillator, external crystal for higher speed oscillator, external 24 MHz clock provided by the ASIC. As the microcontroller is able to clock its SPI line with maximum of one quarter of its clock frequency and that the maximum SPI frequency for the ASIC is 6MHz, the optimum clock frequency is achieved by using the 24MHz provided by the ASIC (i.e. 24MHz/4 = 6MHz).
For the reset behavior of the microcontroller and ASIC, voltage supervisors are used. Such a circuit monitors the system’s supply voltage, and in case of abnormal voltage conditions, generates a long-enough reset impulse in order to assure a complete reset of the supervised system.
Concerning the firmware, Profichip® provides a sample project frame, which is used for one of their evaluation boards. The rather extensive package is written in an universal way – many different configuration options are selectable with macros, and parts of the code are activated or deactivated accordingly. Once the Profibus DP state machine is in the data exchange mode, the main user’s function is executed. The communication cycle within the main loop reads the statuses of all the valve controllers, then it copies them into the ASIC, to make the data available for the PLC.
Commands received from the PLC are copied from the ASIC into the microcontroller and then to the valve controllers. To test the card, a set of debugging levels have been programmed. The tests were designed to start with the bare minimum, and then incrementally testing bigger parts of the hardware and firmware. The new card passed all the tests. Regarding the performance, for the old version it used to take 30 to 50ms to read or write one single status page or command into one single valve controller. Now the cycle period is around 1ms. In addition, in the current system, both status pages of all sector valve controllers are read, and every of them can be written within a single cycle. In the worst case, when all valve controllers need to be read and written it will take only 1ms, instead of 880ms.

Primary author

Co-authors

Lajos Gyori (Karlsruhe Institute of Technology) Marco Roda (Ministry of Foreign Affairs) Paulo Gomes (CERN) Rodrigo Ferreira (CERN)

Presentation materials