Speaker
Description
The development of a large scale 65nm CMOS pixel demonstrator chip for very high rate (3GHz/cm2) and very high radiation levels (1Grad) for ATLAS and CMS phase 2 pixel upgrades has taken place within the RD53 collaboration. The development and testing of radiation test structures, building blocks and small scale pixel array demonstrators are summarized together with test and radiation characterization results. The design and verification of a large scale (20mm x 12mm) pixel chip demonstrator, RD53A is described together with an outline of the plans to develop final pixel chips for the two experiments.
Summary
The presentation summarizes the work that has been made within the RD53 collaboration during the last 3-4 years to arrive to the design of a large scale RD53A pixel demonstrator chip, that will be submitted for prototype production in June 2017. The RD53A chip is expected back from prototype production in August and an extensive testing and qualification program will take place during the following months.
The architecture of the RD53A chip will be described together with results from extensive architectural simulations and verifications. The chosen design and verification approach for this complex high rate and high radiation level design will be outlined.
The development and test of a large number of different building blocks (analog front-ends, calibration circuit, Bandgap, DACs, ADC, PLL, serializer, cable driver, serial IO, serial power Shunt-LDO regulator, on-chip monitoring of temperature/radiation/current/voltages, etc.) will be summarized. All building blocks have been prototyped and extensively tested, including radiation testing, to arrive at final building blocks as integrated in the RD53A demonstrator.
The results of several years of radiation characterization of the 65nm technology at both transistor level and circuit level will be summarized to justify key design choices of the RD53A to demonstrate the capability to make pixel chips that can sustain and survive the extremely challenging operating conditions of a HL-LHC era pixel detector.
Finally an outline of how the design and test of the RD53A demonstrator will be used to drive the design of final pixel chips, within RD53, for the phase 2 pixel upgrades of both ATLAS and CMS.