Speaker
Description
For the HGCAL calorimeter upgrade of CMS, two test vehicles were submitted in 2016. They provide the main building blocks of the future ASIC that will read out 50 pF Si-sensors over 10 pC dynamic range. The first test-vehicle features several variants of low-noise, dual-input-polarity current-sensitive preamplifiers. The second test vehicle has eight channels of the full analog-chain : preamplifiers, single-to-differential 25 ns shapers and 11-bit 40MHz SAR-ADC for charge measurement up to 100 fC. A fast discriminator and 50 ps TDC provide Time Over Threshold measurement up to 10 pC as well as Time of Arrival.
Design and measurements of both chips realized in CMOS 130nm will be presented.
Summary
The high granularity silicon tungsten calorimeter (HGCAL) chosen by the CMS collaboration to replace its endcaps for the phase 2 upgrade will provide unprecedented 5D images of electromagnetic showers. The sensors are made of ~1cm² PIN diodes of 100-300 um thickness providing a MIP signal around 1-4 fC. With 6 million channels of low noise, high speed and large dynamic range readout electronics embedded on detector, the front-end ASICs are very challenging and innovative. In particular, the low noise and high gain preamplifier followed by a single-to-differential shaper will provide charge information by being sampled each 25 ns bunch crossing by a 11 bits SAR-ADC. A Time Over Threshold technique (TOT) will provide the charge information for large signals, above 100 fC, when the preamplifier is saturating, using a TDC over 200 ns dynamic range with 50 ps accuracy. The charge data from ADC and TOT will be linearized and stored in a 512 deep-RAM waiting for being selected or not by the L1 trigger. A trigger path will send charge information of summed four channels over 8 bits. The readout electronics will also provide timing information by measuring the Time Of Arrival (TOA) to 25 ps accuracy. The analog power dissipation is below 10 mW/ch and the radiation hardness up to 200 Mrad.
In order to decouple system issues from limitation of each blocks, it has been decided to submit some buildings blocks into test vehicles. Several flavours of DC coupled, low noise, high gain pre-amplifiers, able to read both polarities input signals, were designed, fabricated in TSMC 130 nm and tested in winter 2016. Then, the full analog channel was also fabricated in an 8-channel test vehicle received in april 2017. The noise performances will be discussed as well as the linearity and stability constrained to input detector capacitance variation. Measurements in charge sensitive and current sensitive modes will be shown as well as the full ADC/TOT performance.
