TWEPP 2017 Topical Workshop on Electronics for Particle Physics

Quad Module Hybrid Development for the ATLAS Pixel Layer Upgrade

12 Sept 2017, 16:30

1h 30m

Porter College Dining Hall (USCS)

Board: F9

Poster Production, Testing and Reliability POSTER Session

Speaker

Katherine Dunne (Lawrence Berkeley National Lab)

Description

A quad chip module hybrid—assembled with FE-I4 chips—has been fabricated to test performance in a serially powered module chain as would be used in the upgraded ATLAS pixel layer at the High Luminosity LHC. This poster present results of the development of a flex circuit board interface for the quad chip modules and system integration tests of modules installed on an I-beam. Experience from these hybrid assemblies will inform the design of a flex hybrid for the new large format readout chip, RD53A, which will be produced in 2017 by the RD53 collaboration.

Summary

A quad chip module hybrid—assembled with FE-I4 chips—has been fabricated to test performance in a serially powered module chain as would be used in the upgraded ATLAS pixel layer at the High Luminosity LHC. This poster present results of the development of a flex circuit board interface for the quad chip modules and system integration tests of modules installed on an I-beam. Experience from these hybrid assemblies will inform the design of a flex hybrid for the new large format readout chip, RD53A, which will be produced in 2017 by the RD53 collaboration.

Presentation materials

kdunne_TWEPP2017.pdf