Speaker
Description
The high-luminosity LHC will provide 5-7 times higher luminosites than the orignal design. An improved readout system of the ATLAS Liquid Argon Calorimeter is needed to readout the 182,500 calorimeter cells at 40-80 MHz with 16 bit dynamic range in these conditions. Low-noise, low-power, radiation-tolerant and high-bandwidth electronics components are being developed in 65 and 130 nm CMOS technologies. The design of the readout chain and the status of the R&D of the components will be presented.
Summary
The LHC high-luminosity upgrade in 2024-2026 requires the associated detectors to operate at luminosities about 5-7 times larger than assumed in their original design. The pile-up is expected to increase to up to 200 events per proton bunch-crossing. To be able to retain interesting physics events even at rather low transverse energy scales, increased trigger rates are foreseen for the ATLAS detector. At the hardware selection stage acceptance rates of 1 MHz are planned, combined with longer latencies up to 60 micro-seconds in order to read out the necessary data from all detector channels. Furthermore, the expected total radiation doses of $10^{13} neq/cm^2$ (NIEL) and 0.3kGy (TID) are beyond the qualification range of the current front-end electronics.
Under these conditions, the current readout of the ATLAS Liquid Argon (LAr) Calorimeters does not provide sufficient buffering and bandwidth capabilities. Furthermore, the expected total radiation doses are beyond the qualification range of the current front-end electronics. For these reasons a replacement of the LAr front-end and back-end readout system is foreseen for all 182,500 readout channels, with the exception of the cold pre-amplifier and summing devices of the hadronic LAr Calorimeter.
The system will follow a free-running architecture, where the calorimeter signals are amplified, shaped and digitized by on-detector electronics, then sent at 40MHz to the backend, which performs the energy and time reconstruction, and buffers the data until trigger signals are received.
The analogue electronics needs to amplify and shape the triangular calorimeter signals over a dynamic range of 16 bits, with low noise and excellent linearity. Developments of low-power preamplifiers and shapers to accomodate these requirements are ongoing in two technologies. In CMOS 65 nm, a fully differential design allows to cover the dynamic range with a programmable termination, two gains and a shaper stage with programmable peaking time. A second design is implemented in 130 nm CMOS, which features a new line termination preamplifier using an electronically cooled resistance. The tests of the two gains of this prototype demonstrate an excellent linearity and the stability of the input impedance.
In order to digitize the analogue signals after shaping, radiation-hard, low-power 40MHz 14-bit ADCs are being developed using a SAR architecture in 65 nm CMOS technology. Such ADCs will allow the digitization of the full calorimeter dynamic range using a two-gain system.
This architecture will lead to a total bandwidth of 275 Tbps to be sent off-detector. A newly designed VCSEL array driver shows that the required 10Gb/s transfer rate at 20-35mW per channel is achieved, suitable for integration into a low-power optical link package.
Results from the design studies on the performance of the components of the LAr readout system will be presented, as well as the results of the tests of the first prototypes.
Abstract submitted on behalf of the ATLAS Liquid Argon Speaker's Committee
Speaker to be nominated later
