19–23 Feb 2018
Other Institutes
America/Mexico_City timezone

Development of a new Front-End electronics in Si and Si-Ge technology for the Resistive Plate Chamber (RPC) detector for high rate experiments

22 Feb 2018, 14:00
20m
Other Institutes

Other Institutes

Puerto Vallarta, Jalisco State, MEXICO Organized by Universidad Iberoamericana, UNAM, BUAP & CINVESTAV

Speaker

Luca Pizzimento (INFN e Universita Roma Tor Vergata (IT))

Description

The upgrade of the Resistive Plate Chamber (RPC) detector, in order to increase the detector rate capability and to be able to work efficiently in high rate environment, consists in the reduction of the operating voltage along with the detection of signals which are few hundred µV small. The approach chosen by this project to achieve this objective is to develop a new kind of Front-End electronics which, thanks to a mixed technology in Silicon and Silicon-Germanium, enhance the detector performances increasing its rate capability.
The Front-End developed is composed by a preamplifier in Silicon BJT technology with a very low inner noise (1000 e^- rms) and an amplification factor of 3-4mV/fC and a new kind of discriminator in SiGe HJT technology which allows a minimum threshold of the order of 0.5 mV.
The performances of this kind of Front-End will be shown. The results are obtained by using the CERN H8 beamline with a full-size RPC chamber of 1 mm gas gap and 1.2 mm thickness of electrodes equipped with this kind of Front-End electronics.

Primary authors

Luca Pizzimento (INFN e Universita Roma Tor Vergata (IT)) Roberto Cardarelli (INFN e Universita Roma Tor Vergata (IT))

Co-authors

Elio Alunno Camelia (Universite de Geneve (CH)) Salvatore Bruno (INFN e Universita Roma Tor Vergata (IT)) Alessandro Caltabiano (INFN e Universita Roma Tor Vergata (IT)) Dr Alessandro Rocchi (INFN e Università Tor Vergata) Lorenzo Massa (INFN e Universita Roma Tor Vergata (IT))

Presentation materials