17–21 Sept 2017
Geneva
Europe/Zurich timezone

4EO1-06 Superconductor Electronics Fabrication Process with Self-Shunted Josephson Junctions and Kinetic Inductors

21 Sept 2017, 14:45
15m
CICG Room 3+4 (Geneva)

CICG Room 3+4

Geneva

Speaker

Tolpygo Sergey (MIT Lincoln Laboratory)

Author

Tolpygo Sergey (MIT Lincoln Laboratory)

Presentation materials