Speaker
Description
The phase-2 upgrade of the LHC will substantially increase the instantaneous luminosity. This requires novel pixel readout chips with highly complex digital architectures, which deliver hit information at drastically increased data rates and unprecedented radiation tolerance, especially close to the interaction point. The RD53 collaboration was formed to approach these challenges by designing a prototype pixel readout chip in 65 nm CMOS technology, which is suitable for the innermost layers of the pixel detector in the ATLAS and CMS experiments.
The large scale prototype chip RD53A has been produced and is available since December 2017. The locking behavior and the stability of the high speed Aurora links of un-irradiated RD53A chips have been investigated in lab environments with different cables, powering schemes, PLL configurations and synchronization patterns. Performance characterization measurements of the output line drivers are ongoing.
In order to perform characterization- and test beam measurements, the readout system BDAQ53 has been developed. It consists of an FPGA-based readout board and a Python-based data acquisition and analysis framework.
First irradiation studies at room temperature up to the design goal of 500 Mrad have shown that the data link fails after ~300 Mrad and that it only partially recovers after annealing. In order to understand the degradation of the clocking- and communication periphery of RD53A, further investigations are necessary.
During the upcoming irradiation campaigns, the chip will partially be operated in a non-default bypass mode, in which the integrated PLL and Command Data Recovery units are not used. This allows to operate the chip in a wider frequency- and digital supply voltages range. Various scan routines will monitor the chip performance during the campaigns. The digital logic of the chip will be monitored by continuously running communication tests and injection-based threshold scans. Variations in the threshold distribution and noise of the analog front-ends will be analyzed as a function of the Total Ionizing Dose.
Based on the results, methods to improve the operating parameters and design changes for the upcoming RD53B chip submission will be evaluated and discussed.
