Algorithm for an asynchronous approximation of a center of gravity for charge sharing compensation in pixel detectors’ readout circuits

19 Sept 2018, 14:50
25m
CAR 0.05/0.06 (aula)

CAR 0.05/0.06 (aula)

Oral ASIC ASIC

Speaker

Dr Piotr Otfinowski (AGH University of Science and Technology)

Description

This work presents a novel method for solving the negative effects of charge sharing phenomenon. In contrary to the existing solutions, where the hit position is determined through additional analog signal processing, the presented approach is based on a digital algorithm, called COGITO, which finds the center of gravity of a group of pixels that received and processed fractional charges resulting from a charge shared event. The algorithm concept and its implementation details are presented, followed by measurements results obtained with a test chip designed in a 55 nm CMOS process.

Summary

Division of charge clouds generated in the detector active volume between two or more readout pixels is called charge sharing. It may lead to duplicated or missed registrations of incident X-ray photons. These problems become significant especially in small pixel-pitch or thick detectors. Therefore, the existence of charge sharing is one of the limiting factors in decreasing the pixel’s size in radiation imaging systems. This work presents the implementation details and the measurement results of the algorithm, which was developed for the purpose of compensation of charge sharing in single photon counting X-ray hybrid pixel detectors. Nevertheless, the implementation makes it a very universal solution, applicable in any binary image processing system.

The developed algorithm is called COGITO, standing for approximation of a geometrical Center Of Gravity In a Temporal Object, that is a charge cloud sampled by a pixel detector. Its operation resembles image processing for finding a center of gravity of a binary object in an image. Presented approach has a few advantages over the already presented solutions. Majority of the processing is done in the digital domain, therefore the required analog circuitry is significantly limited in comparison with the existing solutions. Also, the operation is fully asynchronous, therefore no extra clock signal is necessary.

To verify the COGITO algorithm operation, a prototype integrated circuit has been designed and manufactured in a 55 nm CMOS process. The chip it includes an array of 16 × 16 pixels with 50 µm pixel pitch. The circuit contains only the digital part, responsible for the algorithm operation, while the appropriate test signals are generated off-chip.

The measured processing time varies from 8 ns, for the object size of 2 × 2 pixels, up to 145 ns, for objects with the sizes of up to 16 × 16 pixels. The obtained processing times are lower than the dead-times of analog front-end.

The measured power consumption of an entire array, for objects of rectangular shapes with widths and heights from 1 to 16 pixels across ranges from 13.5 μW, for an object consisting of a single pixel, up to 1590 μW for an object of 16 × 16 pixels. The averaged power consumption is approximately equal to 6 μW per active pixel per MHz. As the COGITO algorithm is based entirely on digital signal processing, it has negligible static power consumption.

The area occupation of the logic implementing the algorithm is equal to 16 μm x 28 μm in 55 nm CMOS process, which together with limited required analog circuitry makes the presented method applicable in readout circuits with fast response and fine pixel pitch.

Primary authors

Dr Piotr Otfinowski (AGH University of Science and Technology) Grzegorz Deptuch (Fermi National Accelerator Lab. (US)) Piotr Maj (AGH UST)

Presentation materials