A detector, equipped with 50 µm thin CMOS Pixel Sensors (CPS), is being designed for the Micro-Vertex Detector (MVD) of the CBM experiment at FAIR. MIMOSIS is being developed at IPHC aiming to meet the requirements of the MVD. The sensor is derived from the ALPIDE pixel array read-out architecture (ITS, MFT). The required radiation tolerance is significantly higher, and the required data throughput is 3 times higher than ALPIDE. Thus, a fully revisited digital circuitry was designed to fulfil the requirements. This paper will show the tests results and describes the next step of the development at IPHC.
The Compressed Baryonic Matter (CBM) will be one of the experiments of the future Facility for Antiproton and Ion Research (FAIR) in Darmstadt. The goal of the CBM research program is to explore the QCD phase diagram in the region of high baryon densities using high-energy nucleus-nucleus collisions. The roles of the Micro-Vertex Detector (MVD) are the determination of secondary vertex, background rejection in dielectron spectroscopy, and the reconstruction of weak decays. It will be composed of nearly 300 CMOS Pixel Sensors (CPS) disposed in 4 double sided stations at 5, 10, 15 and 20 centimetres behind the target. The detector will operate in vacuum and in a magnetic field.
The sensor architecture, called MIMOSIS, is developed at IPHC-IKF. MIMOSIS is derived from the ALPIDE sensor designed for the upgrade of the Inner Tracking System (ITS) of the ALICE experiment. MIMOSIS features improved characteristics in order to fulfil the requirements of the CBM experiment. Thus, the required radiation tolerance is about 10 times higher than in the ITS. Moreover, the beam fluctuation can locally increase the number of produced data by a factor of 7 respect to the average. This imposes to revisit the internal data collection architecture, i.e. the digital data sparsification and the transfer logic, in order to face a data flow rating up to 20 Gbits/s. The flow will be regulated via an elastic buffer allowing a throughput of 2.56 Gbits/s on the outputs. Despite the high data rate capability of this large sensor providing an active area close to 1x3 cm², the power consumption needs to be confined below 200 mW/cm² with a frame rate of 200 kframe/s. Such power density is targeted due to the detector vacuum operation.
The sensor will be fabricated in the 180 nm CMOS Imaging Sensor process of TowerJazz, taking advantage of the deep p-well feature which allows the integration of digital circuitry inside the sensitive pixel matrix without reducing the charge collection efficiency. MIMOSIS has a data driven output which allows sustaining the hit rate. The pixel, which is 26.88 µm high and 30.24 µm wide, includes the analogue front-end with digitised output, a full custom digital block to memorise the hit and a priority encoder. The pixel matrix is divided into 64 regions composed of 8 priority encoders to read and store the data of 16 pixel columns. The 16 super regions combine 4 regions in order to reduce the bus width by increasing the memories readout speed. The last level of memories is an elastic buffer which has the ability to write more data than can be read during one frame. This elastic buffer ensures to compensate the beam fluctuation.
This contribution will discuss in details the design progress of the MIMOSIS sensors and provide first test result of a first prototype, called MIMOSIS0 which has the size of 2 regions corresponding to 1/32 of the whole sensor.