12-23 October 2020
GMT timezone

System Design and Prototyping for the CMS Level-1 Trigger at the High-Luminosity LHC

13 Oct 2020, 16:06
Mini Oral and Poster Trigger Systems Poster session B-01


TAPPER, Alex (Imperial College London)


For the High-Luminosity LHC era, the trigger and data acquisition system of the
Compact Muon Solenoid experiment will be entirely replaced. Novel design choices have been
explored, including ATCA prototyping platforms with SoC controllers and newly available
interconnect technologies with serial optical links with data rates up to 28 Gb/s. Trigger data
analysis will be performed through sophisticated algorithms, including widespread use of Machine
Learning, in large FPGAs, such as the Xilinx UltraScale family. The system will process over 50 Tb/
s of detector data with an event rate of 750 kHz. The system design and prototyping will be
described and examples of trigger algorithms reviewed.

Are you a student? No
IEEE Member No
Minioral Yes

Primary author

TAPPER, Alex (Imperial College London)

Presentation materials