Name: TWEPP 2019 Topical Workshop on Electronics for Particle Physics
Start: 2019-09-02T08:00:00+02:00
End: 2019-09-06T16:00:00+02:00
Location: No location set

2.5V step-down DCDCs: a radiation-hard solution for power conversion (in session "Power, Grounding and Shielding")

20 Mrad-TID Effects on Time over Threshold performance of GEMINI chip (in session "Posters")

63U ATCA rack thermal performance and its integration in the undergound areas (in session "Power, Grounding and Shielding")

A 4-Channel 10-Gbps/ch CMOS VCSEL Array Driver with on-chip Charge Pumps (in session "ASIC")

A 32-channel 1-10 GSa/s Flexible Waveform Recording System using the PSEC4A ASIC (in session "Posters")

A 60μm2 HV-CMOS pixel with 0.5 ns timing resolution and 28 μW power consumption for high-density arrays (in session "Posters")

A CANopen based prototype chip for the Detector Control System of the ATLAS ITk Pixel Detector (in session "Posters")

A Clock and Data Recovery Circuit for the ALTAS/CMS HL-LHC Pixel Front End Chip in 65 nm CMOS Technology (in session "ASIC")

A custom FPGA mezzanine card for crosstalk measurements of low-mass cables for the high luminosity upgrade of the ATLAS Pixel detector. (in session "Posters")

A Fault-tolerance Readout Network for High-Density Electrode Array Targeting Neutrinoless Double-Beta Decay Search in TPC (in session "Posters")

A High Speed Programmable Analog-to-Digital Conversion System Based On System in Package (in session "Posters")

A High Throughput Production Scale Front-End Hybrid Test System for the CMS Phase-2 Tracker Upgrade (in session "Production, Testing and Reliability")

A low-power mixed-signal ASIC for readout of SiPM at cryogenic temperature (in session "Posters")

A Monitoring 12-bits Fully Differential Second Order Incremental Delta Sigma Converter ADC for TimePIx4 (in session "Posters")

A Monolithic Active Pixel Sensor for CEPC vertex detector (in session "Posters")

A multi-channel multi-data rate circuit for phase alignment of data in the lpGBT (in session "ASIC")

A multi-channel trigger and acquisition board for TDC-based readout: application to the cosmic rays detector of the PolarQuEEEst 2018 project. (in session "Posters")

A Muon Telescope as Demonstrator of the JUNO Top Tracker Detector (in session "Systems, Planning, Installation, Commissioning and Running Experience")

A NEW COMPACT ELECTRONICS FOR CALICE SIW CALORIMETER READOUT (in session "Posters")

A Precision Pure Clock Distribution System (in session "Optoelectronics and Links")

A Reconfigurable Monolithic Active Pixel Sensor for Digital Electromagnetic Calorimetry (in session "ASIC")

A SiPM Readout Front-end with Fast Pulse Generation and Successive-Approximation Register ADC (in session "Posters")

ALTIROC1, a 25 pico-second time resolution ASIC for the ATLAS High Granularity Timing Detector (HGTD) (in session "ASIC")

ALTIROC2, a readout ASIC for the High Granularity Timing Detector in ATLAS (in session "Posters")

An lpGBT sub-system for environmental monitoring and control of experiments (in session "ASIC")

Analog front-end characterization of the RD53A chip (in session "Posters")

Analysis of Time of Arrival Measurement with Low-Gain-Avalanche-Diode Sensor (in session "Posters")

ATLAS Level-0 Endcap Muon Trigger for HL-LHC (in session "Posters")

ATLASpix3 : A high voltage CMOS sensor chip designed for ATLAS Inner Tracker (in session "Posters")

Automated assembly of large double-sided microstrip detectors of the CBM Silicon Tracking System at FAIR (in session "Posters")

Back-end firmware for the LHCb VELO upgrade phase I (in session "Posters")

Calibration of Active Pixel Sensor based on TowerJazz 0.18 μm Technology with X-ray (in session "Posters")

CaRIBOu – A versatile data acquisition system based on programmable hardware (in session "Posters")

CATIA: APD readout ASIC for the CMS phase 2 ECAL electronics upgrade (in session "Posters")

CERN ASIC support News & Radiation Tolerant device models for 65nm technology (in session "Working groups")

CHIPS: CERN-HEP IC design Platform and Services (in session "Working groups")

CLICTD: A monolithic HR-CMOS sensor chip for the CLIC silicon tracker (in session "ASIC")

Closing (in session "Closure")

COLDATA Architecture, Design and Verification (in session "Posters")

Coming challenges for Photon Science detectors: an ASIC designer perspective (in session "Posters")

Commissioning High-speed readout for the LHCb VELO Upgrade (in session "Systems, Planning, Installation, Commissioning and Running Experience")

Continuous Integration of FPGA Designs and Automation of the Development Environment (in session "ASIC")

Control and Monitoring for a serially powered pixel demonstrator for the ATLAS Phase-II upgrade (in session "Posters")

Depleted monolithic active pixel prototypes for MIP detection and photon counting (in session "ASIC")

Design and operation of radiation hard 65 nm drivers for Silicon Photonics based optical links (in session "Posters")

Design and test of current DACs for threshold tuning of front-end channels for the High Luminosity LHC (in session "Posters")

Design of a radiation hardened TDC with a resolution of 4 ps and an improved interpolation technique (in session "Posters")

Design of Finite State Machines for SRAM-based FPGAs operated in radiation field (in session "Posters")

Design of the Back end card for the JUNO experiment (in session "Posters")

Designing advanced SoCs in technologies down to 28nm CMOS: challenges and solutions. (in session "Invited")

Development of a high bandwidth PCIe card for the ATLAS HL-LHC Upgrade and DUNE experiment (in session "Posters")

Development of an Optical Readout Hybrid for the CMS Outer Tracker Upgrade (in session "Posters")

Development of RD50-MPW2: a high-speed monolithic HV-CMOS prototype chip within the CERN-RD50 collaboration (in session "ASIC")

Development of Readout Electronics for a Digital Tracking Calorimeter (in session "Programmable Logic, Design Tools and Methods")

Development of the Compact Processing Module for the ATLAS Tile Calorimeter Phase-II Upgrad (in session "Programmable Logic, Design Tools and Methods")

Development of ultra-low power 10-bit SAR ADC in 65 nm CMOS technology (in session "ASIC")

Downlink Equalization and Eye Opening Monitor in the lpGBT (in session "ASIC")

eFEX preproduction module design and test (in session "Trigger")

Effects Of Gamma Irradiation On Leakage Current In CMOS Readout Chips For Atlas Upgrades Silicon Strip Tracker (in session "Radiation Tolerant Components and Systems")

Electronics readout for the CGEM - Inner Tracker: TIGER ASIC and electronics chain (in session "ASIC")

Electronics system of the CMS GE1/1 Muon upgrade and performance of the Slice Test during the 2017-18 LHC Run (in session "Systems, Planning, Installation, Commissioning and Running Experience")

EureKA-Maru: an ATCA board for the CMS Phase 2 Tracker Upgrade with centralized slow control and board management solution based on a Zynq Ultrascale+ System-on-Chip (in session "Posters")

EUROPRACTICE EDA Tools for the HEP Community (in session "Working groups")

Evaluation of embedded Linux distributions suitable for control and monitoring CMS phase 2 custom electronics (in session "Posters")

External scrubber implementation for the ALICE ITS Readout Unit (in session "Radiation Tolerant Components and Systems")

FAST: a front-end readout ASIC for a 30 ps time resolution with 6 pF UFSD sensors (in session "Posters")

FELIX – Commissioning the new detector interface for ATLAS trigger and readout (in session "Posters")

First 10Gb/s Transmission with radiation-hardened Silicon Photonic Mach-Zehnder Modulators in a Full Transmission System (in session "Posters")

First experimental results on TOFHIR readout ASIC of the CMS Barrel Timing Layer (in session "ASIC")

First lpGBT-based prototype of the End-of-Substructure (EoS) card for the ATLAS Strip Tracker Upgrade (in session "Systems, Planning, Installation, Commissioning and Running Experience")

First measurements with the CMS DAQ and Timing Hub prototype-1 (in session "Systems, Planning, Installation, Commissioning and Running Experience")

First results of CIC data aggregation ASIC for the future CMS Tracker (in session "Posters")

Focal plane processing in standard CMOS technologies (in session "Invited")

FPGA implementation of a histogram-based parent bunch-crossing identification for the Drift Tubes chambers of the CMS experiment (in session "Trigger")

Future Prospects of Particle Physics (in session "Invited")

GE1/1 Sustained Operations Investigations (in session "Posters")

Hardware production quality control for the ATLAS Phase-I readout upgrade (in session "Posters")

High-Precision Luminosity Instrumentation for the CMS Experiment at the HL-LHC (in session "Systems, Planning, Installation, Commissioning and Running Experience")

High-speed design : how to successfully address the high speed challenges : 25Gbps and over (in session "Invited")

Highly-linear FPGA-based Data Acquisition System for Multi-channel SiPM Readout (in session "Programmable Logic, Design Tools and Methods")

Implementation of a CANbus interface for the Detector Control System in the ALICE ITS Upgrade (in session "Posters")

Implementation of a RD53A readout chain using FELIX system and the PiLUP board (in session "Programmable Logic, Design Tools and Methods")

Increased radiation tolerance of CMOS sensors with small collection electrodes through accelerated charge collection (in session "Radiation Tolerant Components and Systems")

Innovative and Expandable Physical Implementation Method for High-Speed Triple Modular Redundant Digital Integrated Circuits in Radiation-Hard Designs (in session "Posters")

Integration, Commissioning and First Experience of ALICE ITS Control and Readout Electronics (in session "Systems, Planning, Installation, Commissioning and Running Experience")

KARATE - a setup for high rate tests on the CMS Outer Tracker 2S module readout chain (in session "Posters")

Key Building Block Upgradation and Optimization for High-performance Transceivers: Multimode Interferometers from Conventional to Sub-wavelength Regime (in session "Posters")

LASP Test Board cooling simulations - first approach (in session "Working groups")

Library Characterization techniques (in session "Working groups")

Low-power SEE hardening techniques and error rate evaluation in 65nm readout ASICs (in session "Posters")

LpGBT Tester: an FPGA based test system for the lpGBT ASIC (in session "Posters")

MARTA's DAQ system (in session "Posters")

Measurement results for AARDVARC: Waveform Sampling System On Chip with Picosecond Timing Resolution (in session "Posters")

Methods for Clock Signal Characterization using FPGA Peripherals (in session "Posters")

Module and System Test Development for the Phase-2 ATLAS ITk Pixel Upgrade (in session "Systems, Planning, Installation, Commissioning and Running Experience")

Multi-channel time-tagging module for fast-timing Resistive Plate Chamber detectors (in session "Programmable Logic, Design Tools and Methods")

Multi-threaded TCP hardware stack for pixel detector readout on 10 Gigabit Ethernet (in session "Posters")

New Quench Detection System to Enhance Protection of the Individually Powered Magnets in the Large Hadron Collider (in session "Posters")

Opening act (in session "Welcome")

Overview of Electronics Developed by ISE for the European Spallation Source Project (in session "Posters")

Overview of the HL-LHC Upgrade for the CMS Level-1 Trigger (in session "Trigger")

Particle detection and imaging using the Medipix and Timepix ASICS: design, challenges and applications (in session "Invited")

Performance of LAUROC1, ATLAS Liquid Argon Upgrade ReadOut Chip (in session "ASIC")

picoTDC: A 3ps bin bize 64 channel TDC for HEP experiments (in session "ASIC")

Power hybrids for silicon modules with macro-pixel and strip sensors for the CMS Phase-2 tracker upgrade (in session "Packaging and Interconnects")

Powering of the CMS Phase-2 Upgraded Tracker (in session "Power, Grounding and Shielding")

Processing of the Liquid Xenon Calorimeter’s Signals for Timing Measurements (in session "Posters")

Production, Quality Control and Performance of VFAT3 Front-end Hybrids for the CMS GE1/1 Upgrade (in session "Production, Testing and Reliability")

Proton-Induced Radiation Effects in MAROC3, a full readout 0.35 µm SiGe ASIC (in session "Posters")

Prototyping of Hybrid Circuits for the CMS Phase Two Outer Tracker Upgrade at the HL-LHC (in session "Packaging and Interconnects")

Qualification of the final LHCb VELO electronics (in session "Posters")

Radiation damage of Silicon Photomultipliers by irradiated fast neutrons (in session "Posters")

Radiation Hardness Tests Done on KINTEX-7 FPGA for High Energy Physics Experiments (in session "Posters")

Radiation Physics Lab: A TID test installation at USC (in session "Invited")

RD53A chip susceptibility to electromagnetic conducted noise (in session "Posters")

Readiness of the ATLAS Tile Calorimeter link daughterboard for the High Luminosity LHC era (in session "Posters")

Readout and Trigger Electronics for the Triple-GEM Detectors of the CMS GE2/1 System (in session "Posters")

Realization of a state machine based detection for Track Segments in the Trigger System of the Belle II Experiment (in session "Trigger")

Results of the Powerboard for ATLAS ITk Strip Barrel Modules (in session "Power, Grounding and Shielding")

SALT, a 128-channel readout ASIC for Upstream Tracker in the LHCb Upgrade (in session "ASIC")

Simulation of new charge summing and hit allocation algorithm (in session "Posters")

Stabilization and Protection of the Shunt-LDO regulator for the HL-LHC pixel detector upgrades (in session "Power, Grounding and Shielding")

Study of a triggered, full event zero-suppressed front-end readout chain operating up to 1 MHz trigger rate and 300 pile-up for CMS Outer Tracker upgrade at HL-LHC (in session "Posters")

Study of SEU effects in circuits developed in 110 nm UMC technology (in session "Posters")

TCLink: A Timing Compensated High-Speed Optical Link for the HL-LHC experiments (in session "Optoelectronics and Links")

Test results of a Flexible Printed Circuit for the ATLAS High Granularity Timing Detector (in session "Posters")

The analog readout channel for the Si(Li) tracker of the GAPS experiment (in session "ASIC")

The APOLLO ATCA Platform (in session "Systems, Planning, Installation, Commissioning and Running Experience")

The bPOL12V DCDC converter for HL-LHC trackers: towards production readiness (in session "Power, Grounding and Shielding")

The Digitizer ReAdout Controller (DIRAC) of the Mu2e electromagnetic calorimeter at Fermilab (in session "Systems, Planning, Installation, Commissioning and Running Experience")

The Engineering, Production and Quality Assurance of the Inner Barrel Staves for the Upgrade of the ALICE Inner Tracking System (in session "Production, Testing and Reliability")

The ETROC Project: ASIC development for CMS Endcap Timing Layer (ETL) upgrade (in session "Posters")

The eTx line driver and the eRx line receiver: two building blocks for data and clock transmission using the CLPS standard (in session "Posters")

The Firmware for the European Spallation Source Cavity Simulator (in session "Posters")

The first ASIC prototype of a 28 nm time-space front-end electronics for real-time tracking (in session "Posters")

The hardware demonstrator of the Phase II ATLAS Level-0 MDT Trigger processor (in session "Posters")

The lonely perpetrator in the DCDC FEAST2 case: how an individual transistor threatened the operation of the CMS pixel detector (in session "Invited")

The lpGBT PLL and CDR Architecture, Performance and SEE Robustness (in session "ASIC")

The lpGBT: a radiation tolerant ASIC for Data, Timing, Trigger and Control Applications in HL-LHC (in session "ASIC")

The lpGBTIA, a 2.5 Gbps Radiation-Tolerant Optical Receiver for InGaAs photodiodes (in session "ASIC")

The OBDT board: A prototype for the Phase 2 Drift Tubes on detector electronics (in session "Systems, Planning, Installation, Commissioning and Running Experience")

The powering concept of the CBM Silicon Tracking System (in session "Posters")

The trigger system for the electromagnetic calorimeter of the COMET experiment. (in session "Posters")

The upgraded readout electronics of the CMS ECAL: system overview (in session "Systems, Planning, Installation, Commissioning and Running Experience")

The VRP - a Versatile Readout Platform for the nuclear experiments at HIRFL-CSR (in session "Posters")

Thermal Design and Test of gFEX (in session "Working groups")

Thermal study and optimisation of an ATCA card for the Phase-2 Upgrade of LHC experiments (in session "Working groups")

Throttling Studies for the CBM Self-triggered Readout (in session "Posters")

Time Resolution of Large Area Low Light Level Sensors (in session "Invited")

Triggering on electrons, photons, tau leptons, jets and energy sums with the CMS Level-1 trigger (in session "Posters")

Triple-Modular Redundancy Deployment Optimization in the Sensor Readout System of the CBM Micro Vertex Detector (in session "Posters")

TUTORIAL: Design of Analog Circuits in Nanoscale CMOS (in session "Tutorial")

Upgrade of the ATLAS MDT Readout and Trigger for the HL-LHC (in session "Trigger")

Upgrade of the ATLAS TileCal High Voltage system (in session "Posters")

Using advanced SoCs at the CERN experiments and accelerator (in session "Invited")

Versatile firmware for the Common Readout Unit (CRU) of the LHC ALICE experiment. (in session "Programmable Logic, Design Tools and Methods")

Versatile Link+ Transceiver Production Readiness (in session "Optoelectronics and Links")

VICE++: a building block of the debug and quality control systems for CMS ECAL upgrade on-detector electronics (in session "Posters")

VMM3a, an ASIC for tracking detectors (in session "Posters")

Welcome (in session "Working groups")

Welcome 1 (in session "Welcome")

Welcome 2 (in session "Welcome")

Welcome 3 (in session "Welcome")

X-ray measurements of the effects of radiation damage in the miniMALTA DMAPS prototype (in session "Posters")

TWEPP 2019 Topical Workshop on Electronics for Particle Physics

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TWEPP 2019 Topical Workshop on Electronics for Particle Physics

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