CERN
Author in the following contributions
- A multi-channel multi-data rate circuit for phase alignment of data in the lpGBT
- Development of an Optical Readout Hybrid for the CMS Outer Tracker Upgrade
- Innovative and Expandable Physical Implementation Method for High-Speed Triple Modular Redundant Digital Integrated Circuits in Radiation-Hard Designs
- LpGBT Tester: an FPGA based test system for the lpGBT ASIC
- Prototyping of Hybrid Circuits for the CMS Phase Two Outer Tracker Upgrade at the HL-LHC
- Methods for Clock Signal Characterization using FPGA Peripherals
- The eTx line driver and the eRx line receiver: two building blocks for data and clock transmission using the CLPS standard
- The lpGBT: a radiation tolerant ASIC for Data, Timing, Trigger and Control Applications in HL-LHC
- The lpGBT PLL and CDR Architecture, Performance and SEE Robustness
- A 4-Channel 10-Gbps/ch CMOS VCSEL Array Driver with on-chip Charge Pumps
- An lpGBT sub-system for environmental monitoring and control of experiments
- Downlink Equalization and Eye Opening Monitor in the lpGBT
