In this paper, an lpGBT sub-system for environmental monitoring and control of experiments is presented. The monitoring part contains an 8 external and 8 internals inputs followed by a 16-to-1 multiplexer, instrumentation amplifier with selectable gain and a 10-bit ADC. A constant current source can be enabled on each external input to facilitate resistances measurements. Internal channels are used to monitor power supplies and the output of the temperature sensor. The control part includes a precise 1V voltage reference and a 12-bit voltage DAC. All the blocks were prototyped in 65nm CMOS technology, fully characterized and measurement results are presented.
In detector systems of modern particle physics experiments environmental monitoring and control system is indispensable.
This work presents the design and measurements results of such system implemented in the lpGBT ASIC. For monitoring of analog signals, a fully differential instrumentation amplifier with three selectable gains (x2, x8, x16) and fully differential 10-bit SAR ADC were developed. Such a solution allows single-ended and differential mode measurements. The selectable gain enables measurements for input voltage differential range from +/-500mV down to +/-70mV (in highest gain) in a wide range of input common mode voltage from 0.4V to 0.9V. Each of the voltage inputs is equipped with an internal current source (0-1mA), controlled by an 8-bit DAC which can be used to supply current to resistive sensors like PT1000 or to bias analog circuits.
The ADC reference voltage is 1V scaled up from ~0.3V provided by the bandgap circuit. A PTAT branch from the bandgap circuit is used as an internal temperature sensor. The reference voltage can be also used to bias external circuits and guarantees stable voltage with capacitive loads up to 10nF.
A 12-bit voltage DAC delivers precise voltages in the 0-1V range.
All blocks will be calibrated during production testing to cancel the effects of process variations. The calibration constants will be stored in a dedicated on-chip non-volatile memory.
Performed measurements confirmed the full system functionality and very good agreement with simulations. In particular, the ADC channels achieves good performance with DNL and INL linearity errors around 1 LSB and effective resolution of around 9 bits. Very good linearity has been measured for all gain configurations. Detailed measurement results for all the circuits will be presented at the workshop.