Sep 2 – 6, 2019
Europe/Zurich timezone


Sep 3, 2019, 5:20 PM
Poster Systems, Planning, Installation, Commissioning and Running Experience Posters


Jimmy Jeglot (CNRS IN2P3 LAL Orsay)


Ultra-compact electronics is required for the control and readout of the Silicon-Tungsten electromagnetic calorimeter of the future ILD detector (CALICE collaboration). Prototypes have been designed years ago, comprising the ASUs (Active Sensor Units) located inside the detector Slab and housing the front-end ASICs, and an external part for controlling the system and reading out physics data. Up to now, the latter was not to scale with the reduced space and power available at the Slab extremity. The paper will present the new SL-BOARD which has been designed together with a kapton-based interconnection system in order to fit these stringent requirements.


The Silicon-Tungsten electromagnetic calorimeter (SiW ECAL) of the future ILD detector (CALICE collaboration) is based on the concept of highly integrated modules internally housing the so-called ASU boards (Active Sensor Units), themselves housing the front-end electronics ASICs (SKIROC). The Slab (up to 13 interconnected 1024-channel ASUs) needs to be configured, supplied with low voltage and read out via the new digital interface which consists of three elements:
- The SLab digital interface board (SL-board) which is connected to the first ASU of the chain.
- The Control & Readout Kapton (C&R Kapton) which connects the SL-boards to the Control and Readout (CORE) module.
- The CORE Module which performs the interface for power, control and readout of detector modules.
In the ILD Detector, the SL-board will be installed between the ECAL and the HCAL which are separated by only 67 mm including 25 mm of mechanical tolerance. In the other dimension, the extension has to be less than 70 mm because of the detector electronics cooling. The SL-board respects these daunting space constraints and is designed for low power consumption and good signal integrity. High versatility for testing and debugging of the system was also taken into account.
The SL-Board handles the Control & Readout of the chained ASUs, therefore communicating with the SKIROC chips, and the interface to the CORE acquisition module through a kapton cable (rigid PCB on the slab side with a flex part on the CORE side). It is designed around an Altera MAX10 mixed CPLD/FPGA low power technology. It is equipped with a 40MHz oscillator and a remote USB interface permitting a standalone control of the Slab and an easy debugging of the full set of interconnections.
In order flexibly deal with the angle of 45° of the C&R Kapton, the SL-Board provides a flex extension of 40 mm in length, holding a 0.8mm pitch connector. Its 40 pins transmit differential pairs for sensitive signals, unipolar signal lines, a few spare lines, and ground. The rigid part of the C&R Kapton can connect up to 15 SL-boards, each of which has its own individual flow control and readout differential lines in addition to the common lines.
The CORE-Module is based on a mother board (CORE-Mother) which provides the interface to the DAQ (USB and Gbit UDP (both copper and optical)), reception and transmission of the DAQ clock, delivery of adequate power supplies. The CORE-Daughter is connected to the C&R Kapton flex via a 100-pin connector. Its role is mainly the transmission of clock and fast signals to the SL boards, the collection of event data, and the control of detector electronics. Event data travels in parallel on individual differential lines on the CORE Kapton and is grouped on an event by event basis in the CORE daughter, before being transmitted to DAQ.
A powerful software with graphical interface has been developed for controlling the full system.
The paper will present the implementation of the system in test beam at DESY during summer 2019.

Primary authors

Dominique Robert Breton (CNRS IN2P3 LAL Orsay) Jimmy Jeglot (CNRS IN2P3 LAL Orsay) Mrs Jihane Maalmi (CNRS IN2P3 LAL Orsay)


Pascal Rusquart (CNRS IN2P3 LAL Orsay)

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