The luminosity increase of the LHC in Phase-II calls for an in-depth redesign of the entire MDT readout chain. While the high rate of primary detector signals requires increased bandwidth at each level of the data path, the MDT readout must, in addition, supply accurate coordinate information to the trigger system, leading to more reliable identification of high-pT tracks. The pre-selection of muon hits in the presence of large backgrounds from and neutron conversions requires high-speed processing power as well as fast data links, capable to supply the relevant information to the MUCTPi inside the latency of 10 micros
The upgrade of the MDT readout electronics for the Phase-II of LHC operation must improve the present readout architecture with respect to two main requirements. First, the data path of the readout from the MDT front-end up to permanent storage has to be tailored to the increased data rates at HL-LHC. Second, the MDT readout has to act as a secondary data source for the Level-1 trigger system, providing accurate track coordinates to improve the final Level-1 trigger decision.
In the new readout architecture, as presented in the Muon TDR, bandwidth and performance have been increased at all stages of the readout chain. At the front-end, new ASICs have been developed for ASD and TDC. Due to newer chip technology, the ASD performance could be improved with respect to peak time, noise and equality of thresholds among the 8 channels; the architecture of the TDC has been optimized for high data throughput by implementing separate FIFOs for each channel and the bandwidth of the data link to the on-chamber data concentrator (CSM = Chamber Service Module) has been increased from 80 to 320 Mbit/s. At the next level of readout, communication and data transfer between CSM and processors in USA15 now go via GBT.
At the rear-end, the data stream is split, one going to final storage (FELIX), the other to the Level-1 trigger system, where MDT data are used to refine the selectivity for high-pT muons. This refinement is based on the much higher accuracy of the MDT hit coordinates (~0.1 mm) compared to the ones supplied by the primary trigger chambers (20-30 mm), leading to a more accurate pT-estimate and a reduction of the single muon triger rate by about a factor 3.
The selection of muon hits out of a vast majority of background hits from converted s and neutrons must be performed inside the available latency and requires considerable high-speed processing power. The low-resolution coordinates supplied by the trigger chambers are used as seed for Regions of Interest (RoI). Only hits in a RoI are considered, which leads to a large reduction of the relevant data volume. Hits in a RoI are tested for alignment with the coarse track direction supplied by the trigger chamber. If consistent, the corresponding precision coordinates are sent back to the trigger logics, where a better pT-definition of the muon candidate is derived.
The exchange of information between MDT, trigger logics and RPC/TGC requires fast links, while the identification of tracklets in the RoI needs fast processors and firmware, which is robust against all possible hit patterns.
The present muon trigger could not benefit from the accuracy of the MDT coordinates, because data transmission and processing could not be executed inside the available latency (3 micros). With the 3 times longer latency in Phase-II and with the speed increase for processors and data links, achieved in the last two decades, this concept can now be put into reality and will be described in more detail in the presentation.