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Faustino Gomez (Universidad de Santiago de Compostela)02/09/2019, 15:25Oral
Radiation Physics Laboratory (http://www.usc.es/rpl) is an accredited Secondary Standard Dosimetry Lab in the University of Santiago with more than 10 years of experience on photon and electron TID experiments. Currently the laboratory has a high dose rate 60-Co unit together with an electron linal able to produce 6 MV and 15 MV photon beam qualities and electron beams with 6, 9, 12, 16 and 20...
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Paula López Martínez (University of Santiago de Compostela (ES))02/09/2019, 16:05Oral
The new paradigm of Analog to Information Conversion (AIC) aims at extracting information from the environment rather than simply massive amounts of raw data. Focal plane processing is a way of doing so by means of processing the sensed data at the acquisition stage, efficiently reducing bandwidth and power consumption. The use of standard CMOS technologies favours the development of low cost...
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David Gascon (University of Barcelona (ES))02/09/2019, 17:05Oral
Large area photo-detectors with time resolution of the order of 10 ps for low lights levels, down to the single photon, would bring a revolution in many fields. In medical imaging would enable real time PET, in LIDAR would make possible achieving millimetric spatial resolution requiring no averaging and would have a strong impact in other fields as fluorescence imaging and, of course, in high...
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Albert De Roeck (CERN)03/09/2019, 10:45Oral
An overview will be given where we stand with the fundamental questions in particle physics today, and how we
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plan to answer these in future with new projects world-wide, either already planned ones or those still under discussion.
The ongoing European Particle Physics Strategy Update process is currently evaluating possible future programs and their physics merits.
This general seminar... -
Marc Dobson (CERN)03/09/2019, 15:45Oral
Recent hardware developments in the experiments and the accelerators, especially for the detector readout electronics for the High-Luminosity LHC, are using FPGAs with embedded processors (SoCs).
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This is very popular with HW developers due to the close integration between the computing element running a unix operating system and the programmable logic part of the FPGA. For the HL-LHC, there... -
Jean-Michel CAPITAN (Hardware Expert, CCES)04/09/2019, 10:45Oral
Today communication protocols (32Gbps PCIE Gen5, 112Gbs PAM4, ...) and FPGAs transceivers speeds are pushing
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designer to hardware designs constraints, PCB material choice and layout constraints that where almost never considered years ago.
This presentation is an extract of a CCES technical training, and its purpose is to cover some of the theorical aspects of "high speed",
as well as some... -
Sebastien Caussette (Cadence)04/09/2019, 15:45Oral
Sub 65-nm technologies can offer to engineers huge advantages for the design of high-density and low power circuits and for the integration of high complexity System-on-Chips. Transistors and gates are almost free for the creative designer, but yet their correct integration requires an exponentially increasing investment in tools and training, and a totally new approach to verification, all...
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Federico Faccio (CERN)05/09/2019, 15:45Oral
The failure of a first DCDC converter in the power distribution network of the CMS pixel detector system on October 5th, 2017, might have been due to a single failure and did not raise particular concern. However, it was soon followed by a steady rate of failures of DCDCs in random positions in the detector. Projections of this rate to the future led to an ominous scenario where, without...
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Michael Campbell (CERN)06/09/2019, 10:45Oral
September 2019 marks 20 years since the signature of the Medipix2 Collaboration agreement. Since then 3 generations of pixel detector readout chips have been or are being developed: Medipix2 and Timepix (with recently the addition of Timepix2), Medipix3 and Timepix3 and finally Medipix4 and Timepix4. The Medipix chips have sought to provide high-rate spectroscopic photon counting with...
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Andrea Del Monte (LFoundry)Oral
After a basic review of the working principles of CMOS image sensor (pinned photodiode device), the main technologies and process modules (such as Back-Side Illumination, integrated lightguides and anti-reflective coatings, buried light shields, hybrid bonding) used in the manufacturing of CMOS Image Sensors (CIS) will be described, focusing on their correlation with the performance of pixel...
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