Conveners
Packaging and Interconnects: Parallel Session A4
- Ray Yarema (FNAL)
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Mr Sami Vaehaenen (CERN)22/09/2010, 15:05Packaging and interconnectsOralConventional bumping processes use electroplating for under bump metallization (UBM) and solder deposition. This process is laborious, involves time consuming photolithography, can only be performed using whole wafers and is therefore expensive in low volumes. In the low-cost development work, electroless deposition of UBM and novel solder ball placement techniques are studied as substitutes...Go to contribution page
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Mr Ashley Greenall (The University of Liverpool)22/09/2010, 15:30Packaging and interconnectsOralThe design and performance of prototype single-sided modules with ABCN-25 front-end chips and 10x10 cm2 Hamamatsu silicon strip sensors is presented. A low mass module assembly has been achieved by gluing a single-sided flex circuit, with read out chips, directly onto the sensor. The design exploits the embedded shunt regulation within the ABCN-25 providing for a distributed and scalable...Go to contribution page
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Michael Beimforde (Max-Planck-Institut fuer Physik)22/09/2010, 15:55Packaging and interconnectsOralThe on-going production of a demonstrator module for the ATLAS pixel detector upgrade is presented, exploiting thin planar pixel sensors as well as vertical integration technologies developed at the Fraunhofer Institute –IZM in Munich. The Solid-Liquid-InterDiffusion (SLID) technique is employed as an alternative to the bump-bonding process, to connect thin pixel sensors to the ATLAS FE-I3...Go to contribution page