Speaker
Description
The Belle II experiment has started to consider a possible upgrade leading a higher luminosity than the current design value. Due to a larger beam background and a higher trigger rate expected at the upgraded luminosity, the Belle II silicon strip detector, which measures the vertex position together with the Belle II pixel detector, has to be upgraded as well. Aiming for this upgrade, we are developing a new double-sided silicon strip detector (DSSD) and a new front-end ASIC.
The DSSD sensor is required to have a thinner thickness and finer strip pitches for better beam background tolerance and better physics-measurement performance. The target thickness of the DSSD sensor is 140um and the dimension is about 53mm x 59mm. The strip pitches are 50um for p-side and 75um for n-side. The mask design of the new DSSD sensor which satisfies those specifications has been completed.
The front-end ASIC is required to have smaller noise performance and higher trigger capability. The ASIC reads out 128-channel binary hit information with the 127MHz clock frequency. Each readout channel has 2k-depth ring buffer memory to store the hit information until the ASIC receives a trigger signal to output the hit event. The design of the first prototype ASIC, SNAP128A, is almost finalized with 180nm CMOS technology. The size of SNAP128A is about 5.9mm x 6.1mm.
In this presentation, we report the designs of the developed DSSD sensor and SNAP128A, and simulated performance of SNAP128A. We also present the prospect of the new silicon strip detector development.
