Speaker
Description
For the high luminosity era of the Large Hadron Collider (HL-LHC) it is foreseen to replace the current inner tracker of the ATLAS experiment with a new detector to cope with the occurring increase in occupancy, bandwidth and radiation damage. It will consist of an inner pixel and outer strip detector aiming to provide tracking coverage up to |η|<4. The layout of the pixel detector is foreseen to consist of five layers of pixel silicon sensor modules in the central region and several ring-shaped layers in the forward region. It results in up to 14 m² of silicon depending on the selected layout. Beside the challenge of radiation hardness and high-rate capable silicon sensors and readout electronics many system aspects have to be considered for a fully functional detector. The modules will be powered serially to reduce the power consumption and both stable and low mass mechanical structures and services are important. An effort was started to prototype a demonstrator with about 40 modules powered in six serial powering chains. The prototype was built with realistic mechanics and services. The test infrastructure includes not only the prototype but all elements of a full system from pixel modules, services, the detector control system and interlock, to power supplies and readout systems. Detail tests have been carried out with the modules based on the front-end chip FE-I4 [1] due to the dedicated shunt-regulators (Shunt-LDO) that can be operated with a constant current as needed for serial powering. In the presentation, the latest results and full evaluation of the electrical prototype are presented. Important qualification steps of the system design and its operation are discussed.
