Speaker
Description
– Since the 80s and the 90s it is known that Terrestrial Cosmic Rays,
mainly reported as ‘Atmospheric Neutrons’, as well as muons and protons, of
cosmic origin, can penetrate the natural shielding of buildings, equipment and
circuit package. Eg, flux of thermal to high-energy neutron of interest ranges
between ~10 particles.cm-2.hour-1 at sea level to ~104 cm-2.hour-1 at typical
airplanes flight altitude of 40000 feet. They eventually can trigger Soft Errors
and Hard Errors such as Latch-up in integrated circuits and Breakdown of
power devices. Besides, the elementary transistor device shrinking, pitch or
gate length, affected the stored charge per bit of information, making devices
more and more susceptible.
From a Real Time viewpoint, this evolution allowed gate delay down to some
picoseconds and signal bandwidth to dramatically increase to Gbits/s and
more. As a consequence, downscaling of device design affected signal
integrity margins and rendered the single event effect more effective because
more and more minute ionizing transients were captured as parasitic signals.
We present a simple model resulting in an evolutionary diagram of the signal
charge from micrometer and submicrometric to deca-nanometer compared to
the transient charge induced by an ionization track.
The dramatic growth of the size of DRAM and SRAM memory (MB, GB, TB)
caused the resulting Failure-In-Time and Soft Error Rate at circuit and system
level to become unacceptable in standalone or embedded processors, FPGAs
and System-on-Chips. Test standards and design solutions have been
proposed to assess and maintain the reliability of commercial products and
improve such as those used in stringent applications mainly in avionic flight
computers, but also physics large hadron colliders fusion research facilities,
and even some radiotherapy areas and high-end computing and routing the
Internet.
