Development of a CompactPCI-Serial Hardware Toolbox for SLS-2.0

20 Sept 2022, 16:40
1h
Terminus Hall Lounge and Terminus Hall

Terminus Hall Lounge and Terminus Hall

Poster Systems, Planning, Installation, Commissioning and Running Experience Tuesday posters session

Speaker

Mr Patrick Pollet (PSI-Paul Scherrer Institut)

Description

Motivated by upcoming large upgrade projects at PSI and due to increasing demands for performance (handling more data, faster processing) in various subsystems of the accelerator and beamlines, our electronics and control system experts had the task to evaluate alternatives to the existing VME technology and build a new portfolio of electronic hardware tools accordingly. CompactPCI-Serial was chosen as the standard platform for building our future modular control and data acquisition systems. We report on the state of the current challenging developments and describe system architectures for building high performance control and data acquisition systems.

Summary (500 words)

Motivated by upcoming large upgrade projects at PSI, most prominently SLS2.0, and due to increasing demands for performance (handling more data, faster processing) in various subsystems of the accelerator and beamlines, our electronics and control system experts had the task to evaluate alternatives to the existing VME technology and build a new portfolio of electronic hardware tools accordingly. CompactPCI-Serial was chosen as the standard platform for building our future modular control and data acquisition systems. We are currently developing two CompactPCI-Serial FPGA boards: FMC+ carrier and the COM-I/O. Both cards use the same family of Xilinx MPSoC (Zynq UltraScale+) as their processing building block. Combination of these two boards, together with COTS hardware should provide our system architects with enough flexibility to build systems with required budget and performance (high-end and/or low-cost) for various applications. We report on the state of the current challenging developments and describe system architectures for building high performance control and data acquisition systems using our hardware toolbox. Special attention is paid to the criteria which led to the choice of the new system.

Primary author

Mr Patrick Pollet (PSI-Paul Scherrer Institut)

Co-authors

Mr Babak Kalantari (Paul Scherrer Institut) Dr Waldemar Koprek (Paul Scherrer Institut) Mr Dragutin Maier-Manojlovic (Paul Scherrer Institut) Mr Gert Theidel (Paul Scherrer Institut)

Presentation materials